Test apparatus and test method
AssigneeAdvantest Corporation
InventorHiromi Oshima
Life of this patent
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Abstract
Provided is a test apparatus that tests a device under test outputting a data signal and a clock signal indicating a timing at which the data signal is to be sampled, the test apparatus comprising a data acquiring section that acquires the data signal output by the device under test, at a timing corresponding to the clock signal output by the device under test; a masking section that masks the acquisition of data by the data acquiring section, while the device under test is not outputting the clock signal; and a judging section that judges pass/fail of the device under test based on a result of a comparison between the data signal acquired by the data acquiring section and an expected value.
Claims20
A test apparatus that tests a device under test outputting a data signal and a clock signal indicating a timing at which the data signal is to be sampled, the test apparatus comprising:
- a data acquiring circuit that acquires the data signal output by the device under test, at a timing corresponding to the clock signal output by the device under test;
- a judging circuit that judges pass/fail of the device under test based on a result of a comparison between the data signal acquired by the data acquiring circuit and an expected value;
- and
- a masking circuit that masks the acquisition of data by the data acquiring circuit, while the device under test is not outputting the clock signal, so as to prevent the judging circuit from making a judgment based on invalid data.
A test method performed by a test apparatus that tests a device under test outputting a data signal and a clock signal indicating a timing at which the data signal is to be sampled, the test method comprising:
- acquiring, using a data acquiring circuit of the test apparatus, the data signal output by the device under test, at a timing corresponding to the clock signal output by the device under test;
- judging, using a judging circuit of the test apparatus, pass/fail of the device under test based on a result of a comparison between the data signal acquired by the data acquiring section and an expected value;
- and
- masking, using a masking circuit of the test apparatus, the acquisition of data by the data acquiring circuit, while the device under test is not outputting the clock signal, so as to prevent the judging circuit from making a judgment based on invalid data.
Dependencies are inferred from the claim text.