Methods and structure for hardware serial advanced technology attachment (SATA) error recovery in a serial attached SCSI (SAS) expander
AssigneeLSI Corporation
InventorGurvinder Pal Singh
Life of this patent
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AssigneeLSI Corporation
InventorGurvinder Pal Singh
Estimating the term…
Methods and structure for enhanced SAS expander functionality to store and forward buffered information transmitted from an initiator device to a target device and to process errors in control circuits of the expander without intervention from the general purpose programmable processor of the expander. A PHY of an expander is associated with control circuits that comprise buffering of commands to be forwarded to an end device directly coupled to the PHY. The control circuits locally process errors detected from the end device. The control circuits comprise a SATA host circuit adapted to communicate with a SATA end device to detect and clear error conditions and a SATA target circuit to communicate with one or more STP initiator devices to report and clear error conditions reported by the end device. The structures and methods may also service SAS connections (in addition to STP connections).
A Serial Attached SCSI (SAS) expander comprising:
A method operable in a Serial Attached SCSI (SAS) expander, the expander having one or more host physical links (PHYs) each coupled with a corresponding Serial Advanced Technology Attachment (SATA) Tunneling Protocol (STP) initiator device and having a target PHY directly coupled to a SATA end device, the expander having a programmable controller and a control circuit separate from the programmable controller, the method comprising:
A method operable in a Serial Attached SCSI (SAS) expander, the expander having one or more host physical links (PHYs) each coupled with a corresponding Serial Advanced Technology Attachment (SATA) Tunneling Protocol (STP) initiator device and having a target PHY directly coupled to a SATA end device, the expander having a programmable controller and a control circuit separate from the programmable controller, the control circuit comprising a SATA host circuit coupled with the target PHY, the control circuit further comprising a SATA target circuit coupled with each of the one or more host PHYs, the control circuit further comprising a buffer coupled with the SATA target circuit and coupled with the SATA host circuit, the method comprising:
Dependencies are inferred from the claim text.