Efficient extraction of execution sets from fetch sets
AssigneeAvago Technologies General IP (Singapore) Pte. Ltd.
InventorsAlexander Rabinovitch, Leonid Dubrovin
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Abstract
An apparatus having a buffer and a circuit is disclosed. The buffer may be configured to store a plurality of fetch sets. Each fetch set generally includes a prefix word and a plurality of instruction words. Each prefix word may include a plurality of symbols. Each symbol generally corresponds to a respective one of the instruction words. The circuit may be configured to (i) identify each of the symbols in each of the fetch sets having a predetermined value and (ii) parse the fetch sets into a plurality of execution sets in response to the symbols having the predetermined value.
Claims20
An apparatus comprising:
- a buffer configured to store a plurality of fetch sets as received in a fetch set order from an instruction memory, wherein (i) each of said fetch sets comprises a prefix word and a plurality of instruction words, (ii) each of said prefix words comprises a plurality of symbols and (iii) each of said symbols corresponds to a respective one of said instruction words;
- and
- a circuit configured to (i) identify each of said symbols in each of said fetch sets having a predetermined value and (ii) parse said fetch sets into a plurality of execution sets in response to said symbols having said predetermined value, wherein each of said symbols has (a) said predetermined value to identify an initial one of said instruction words in a respective one of said execution sets and (b) another value to identify a subsequent one of said instruction words after said initial instruction in said respective execution sets.
A method for an efficient extraction of a plurality of execution sets from a plurality of fetch sets, comprising the steps of:
- (A) storing said fetch sets in a buffer as received in a fetch set order from an instruction memory, wherein (i) each of said fetch sets comprises a prefix word and a plurality of instruction words, (ii) each of said prefix words comprises a plurality of symbols and (iii) each of said symbols corresponds to a respective one of said instruction words;
- (B) identifying each of said symbols in each of said fetch sets having a predetermined value;
- and
- (C) parsing said fetch sets into said execution sets in response to said symbols having said predetermined value, wherein each of said symbols has (i) said predetermined value to identify an initial one of said instruction words in a respective one of said execution sets and (ii) another value to identify a subsequent one of said instruction words after said initial instruction in said respective execution sets.
An apparatus comprising:
- means for storing a plurality of fetch sets as received in a fetch set order from an instruction memory, wherein (i) each of said fetch sets comprises a prefix word and a plurality of instruction words, (ii) each of said prefix words comprises a plurality of symbols and (iii) each of said symbols corresponds to a respective one of said instruction words;
- means for identifying each of said symbols in each of said fetch sets having a predetermined value;
- and
- means for parsing said fetch sets into a plurality of execution sets in response to said symbols having said predetermined value, wherein each of said symbols has (i) said predetermined value to identify an initial one of said instruction words in a respective one of said execution sets and (ii) another value to identify a subsequent one of said instruction words after said initial instruction in said respective execution sets.
Dependencies are inferred from the claim text.