System and method for implementing a trace interface
AssigneeCadence Design Systems, Inc.
InventorsArthur Perry Sarkisian, Jingbo Gao, Tsair-Chin Lin
Life of this patent
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Abstract
A system and method for selectively capturing and storing emulation data results from a hardware emulation system, which reduces the data bandwidth requirement and the unnecessary consumption of the DRAM memory capacity by uninteresting data. According to one embodiment, a system comprises a trace array for storing one or more frames of data; a first set of hardware control bits that enables the trace array to selectively capture non-continuous windows of data within a frame of data; a data capture card; and a second set of hardware control bits that enables the data capture card to capture a select frame of data from the one or more frames of data stored on the trace array.
Claims16
An emulation method, comprising:
- emulating a user's logic design on an emulator chip comprising a trace array and a plurality of processor clusters each coupled with the trace array, wherein each processor cluster comprises a plurality of processors and a multiplexer coupled with each of the processors, wherein the multiplexer selects an output signal from one of the plurality of processors and outputs the selected output signal to the trace array;
- capturing a plurality of emulation data bits into a frame of the trace array during a first time window according to a first plurality of values of a first set of hardware control bits, wherein the first time window spans a first plurality of emulation steps;
- capturing a plurality of emulation data bits into the frame during a second time window according to a second plurality of values of the first set of hardware control bits, wherein the second time window spans a second plurality of emulation steps that are non-continuous with the first plurality of emulation steps;
- and
- selectively outputting the frame of data from the trace array based on a second set of hardware control bits, wherein the frame of data is one of the plurality of frames of data captured into the trace array.
A hardware logic emulation system, comprising:
- an emulator chip onto which a user logic design can be mapped, the emulator chip comprising:
- a plurality of emulation processor clusters, an emulation processor cluster of the plurality of emulation processor clusters comprising a plurality of processors;
- and
- a multiplexer coupled to each of the emulation processors, wherein the multiplexer selects an output signal from one of the emulation processors during emulation of the user logic design, and outputs the selected signal to the trace array;
- a virtual hardware control logic configured to generate a first set of hardware control bits and a second set of hardware control bits during emulation;
- and
- a trace array comprising a memory and coupled to the output of the multiplexer configured to receive the selected output signal and selectively store the selected output signal into a plurality of frames of emulation data bits into the memory based on a first set of hardware control bits, wherein a frame of the plurality of frames of emulation data bits comprises a first plurality of emulation data bits captured during a first time window that spans a first plurality of emulation steps and a second plurality of emulation data bits captured during a second time window, non-continuous with the first time window, that spans a second plurality of emulation steps;
- and
- a data capture card that selectively captures a frame of the plurality of frames of data stored in the trace array based on the second set of hardware control bits.
Dependencies are inferred from the claim text.