Power detector with temperature compensation

A method of performing power detection, comprising:

• detecting power of an input signal based on at least one metal oxide semiconductor (MOS) transistor associated with a power detection gain that varies over temperature,
• wherein the input signal is received at a first gate terminal of the at least one MOS transistor;
• generating and applying a variable gate bias voltage to the first gate terminal of the at least one MOS transistor through a first resistor and to a second gate terminal of the at least one MOS transistor through a second resistor,
• wherein the variable gate bias voltage is applied to the first and second gate terminals of the at least one MOS transistor, in addition to the input signal received at the first gate terminal, to vary gate-to-source voltages of the at least one MOS transistor and to maintain approximately constant power detector gain over temperature;
• generating and applying a variable drain bias voltage to the at least one MOS transistor to provide additional control to reduce variations of the power detection gain over temperature.

An apparatus for wireless communication, comprising:

• a power detector configured to receive an input signal and provide an output signal, the power detector having a gain that is dependent on temperature;
• a gain estimation circuit configured to estimate the gain of the power detector;
• and
• a signal compensation circuit configured to compensate the input signal or the output signal, or both, based on the estimated gain of the power detector,
• wherein compensation of the input signal is performed by applying a variable gate bias voltage to the power detector, in addition to the input signal, to vary gate-to-source voltages of transistors in the power detector,
• wherein compensation of the output signal is performed by applying a variable drain bias voltage to the power detector to provide additional control over the output signal.

A method of performing power detection, comprising:

• detecting power of an input signal with a power detector to obtain an output signal, the power detector having a gain that is dependent on temperature;
• estimating the gain of the power detector;
• and
• compensating the input signal or the output signal, or both, based on the estimated gain of the power detector,
• wherein the compensation of the input signal is performed by applying a variable gate bias voltage to the power detector, in addition to the input signal, to vary gate-to-source voltages of transistors in the power detector,
• wherein compensation of the output signal is performed by applying a variable drain bias voltage to the power detector to provide additional control over the output signal.

An apparatus for wireless communication, comprising:

• means for detecting power of an input signal based on a gain of a power detector to obtain an output signal, the power detector gain being dependent on temperature;
• means for estimating the power detector gain;
• and
• means for compensating the input signal or the output signal, or both, based on the estimated power detector gain,
• wherein the means for compensating the input signal includes means for applying a variable gate bias voltage to the power detector, in addition to the input signal, to vary gate-to-source voltages of transistors in the power detector,
• wherein the means for compensating the output signal means for applying a variable drain bias voltage to the power detector to provide additional control over the output signal.

A non-transitory computer-readable medium storing a computer program, the computer program comprising executable instructions that cause a computer to:

• detect power of an input signal based on a power detector gain to obtain an output signal, the power detector gain being dependent on temperature;
• estimate the power detector gain;
• and
• compensate the input signal or the output signal, or both, based on the estimated power detector gain,
• wherein the compensation of the input signal is performed by executable instructions that apply a variable gate bias voltage to the power detector, in addition to the input signal, to vary gate-to-source voltages of transistors in the power detector,
• wherein compensation of the output signal is performed by executable instructions that apply a variable drain bias voltage to the power detector to provide additional control over the output signal.