Method of fabricating integrated semiconductor device with MOS, NPN BJT, LDMOS, pre-amplifier and MEMS unit

An integrated semiconductor device, comprising:

• a substrate having a first region and a second region, wherein the first region and the second region are non-overlapping;
• a semiconductor unit formed on the first region;
• and
• a micro electro mechanical system (MEMS) unit formed on the second region, wherein the MEMS unit comprises a microphone comprising:
• a semiconductor diaphragm having a first diaphragm surface having a plurality of cavities formed in only a partial thickness of the semiconductor diaphragm and exposed to air, and a second diaphragm surface without a cavity and opposite to the first diaphragm surface;
• an interlayer dielectric disposed on the second diaphragm surface of the semiconductor diaphragm;
• and
• a metal layer disposed on the interlayer dielectric, wherein the second diaphragm surface of the semiconductor diaphragm is exposed to an opening passing through the interlayer dielectric and the metal layer.