Process, voltage, temperature independent switched delay compensation scheme

A Delay-lock Loop (DLL) comprising:

• a phase detector configured to compare a phase of a system clock and a feedback clock and provide up and down control signals,
• an adjustable coarse delay circuit and an adjustable fine delay circuit connected in series, the adjustable coarse delay circuit and the adjustable fine delay circuit configured to delay the system clock and for provide the feedback clock,
• a fine delay counter configured to provide a fine delay count value to control a delay of the adjustable fine delay circuit, the fine delay counter being updatable based on the up and down control signals, overflow and underflow conditions of the fine delay counter, and a value,
• a coarse delay counter configured to provide a coarse delay count value to control the delay of the adjustable coarse delay circuit, the coarse delay counter being updatable based on the up and down control signals and the overflow and underflow conditions of the fine delay counter,
• a delay compensation circuit coupled to the fine delay counter, the delay compensation circuit operable to, independently of the up and down control signals, determine the value to be provided to the fine delay counter that indicates a number of fine delay elements of the adjustable fine delay circuit corresponding to a single coarse delay element of the adjustable coarse delay circuit.