Asymmetric full duplex communication including device power communication

An active transceiver circuit for an electrical communication system using wires or coaxial cables for full-duplex transmission of a high bitrate data signal over and reception of a low bitrate data signal from a single ended transmission medium, the low bitrate data signal having a bitrate at least 3 times lower than the high bitrate data signal, the transceiver circuit comprising:

• an input port configured to receive a high bitrate input data signal,
• an output port configured to deliver a low bitrate output data signal,
• a differential input/output port configured to launch a high bitrate data signal into the single ended transmission medium and to receive a low bitrate data signal from the single ended transmission medium,
• a differential output driver configured to receive the differential high bitrate input data signal and transmit this signal to the differential input/output port,
• an averaging circuit configured to perform at least averaging of the signals at output nodes of the differential output driver, and low pass filtering of the averaged signal, and
• a signal restore circuit configured to receive the low pass filtered average signal from the averaging circuit and for generating therefrom a restored low bitrate output data signal on the output port,
• wherein the signal restore circuit comprises a first amplifier and a second amplifier, the second amplifier having positive feedback and being capacitively connected to the output of the first amplifier.

An active transceiver circuit for an electrical communication system using wires or coaxial cables for full-duplex transmission of a high bitrate data signal over and reception of a low bitrate data signal from a single ended transmission medium, the low bitrate data signal having a bitrate at least 3 times lower than the high bitrate data signal, the transceiver circuit comprising:

• an input port configured to receive a high bitrate input data signal,
• an output port configured to deliver a low bitrate output data signal,
• a differential input/output port configured to launch a high bitrate data signal into the single ended transmission medium and to receive a low bitrate data signal from the single ended transmission medium,
• a differential output driver configured to receive the differential high bitrate input data signal and transmit this signal to the differential input/output port,
• an averaging circuit configured to perform at least averaging of the signals at output nodes of the differential output driver, and low pass filtering of the averaged signal, and
• a signal restore circuit configured to receive the low pass filtered average signal from the averaging circuit and for generating therefrom a restored low bitrate output data signal on the output port,
• wherein the averaging circuit is configured to filter out cross-talk originating from the high bitrate input data signal and to allow to pass the edges of the low bitrate data signal with an edge amplitude reduction of maximally 30%.

An active bidirectional transceiver for an electrical communication system using wires or coaxial cables for full-duplex transmission of a high bitrate data signal over and reception of a low bitrate data signal from a single ended transmission medium, the low bitrate data signal having a bitrate at least 3 times lower than the high bitrate data signal, the transceiver circuit comprising:

• an input port configured to receive a high bitrate input data signal,
• an output port configured to deliver a low bitrate output data signal,
• a differential input/output port configured to launch a high bitrate data signal into the single ended transmission medium and to receive a low bitrate data signal from the single ended transmission medium,
• a differential output driver configured to receive the differential high bitrate input data signal and transmit this signal to the differential input/output port,
• an averaging circuit configured to perform at least averaging of the signals at output nodes of the differential output driver, and low pass filtering of the averaged signal, and
• a signal restore circuit configured to receive the low pass filtered average signal from the averaging circuit and for generating therefrom a restored low bitrate output data signal on the output port,
• the transmission medium comprising:
• an inner conductor and a conductive shield layer,
• the transceiver further comprising:
• a third transmission line coupled to the differential input/output port and arranged to be coupled to the inner conductor of the single ended transmission medium, and
• a fourth transmission line coupled to the differential input/output port and arranged to be coupled to the conductive shield layer of the single ended transmission medium, the fourth transmission line further being end terminated,
• wherein the third transmission line is AC coupled and wherein a third impedance is coupled to the third transmission line for device power communication,
• wherein the third impedance includes at least two components in series, wherein the first component connected to the first transmission line is configured to allow edges of the high bitrate input data signal to pass with an edge amplitude reduction of not more than 30%, and wherein the second component is configured to allow the low bitrate data signal to pass such that the signal restore circuit is able to recover the low bitrate output data signal substantially without errors.