Immunity against temporary and short power drops in non-volatile memory: pausing techniques
AssigneeSanDisk Technologies LLC
InventorYan Li
Life of this patent
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Abstract
A mechanism is presented memory circuits, such a NAND-type flash memories, to autonomously protect themselves from temporary and short power drops. A detection mechanism looks for the supply voltage to drop below a function voltage for a period of time. When such an event occurs, a suspend mechanism is activated, and after completing the last micro-operation (such as a program pulse) the memory freezes. When power is again stable at an operational level, the suspended operation is resumed. The memory controller can then be notified upon occurrence of such voltage drop by polling a special status bit. Examples of how the pausing can be implemented include altering of clock signals and suspending sub-phases of larger operations.
Claims10
A method of operating a non-volatile memory circuit, comprising:
- while performing a first operation having multiple sub-phases, receiving a pause command;
- in response to the pause command, determining whether the sub-phase of the first operation being executed is pausable;
- in response to determining the sub-phase being executed is pausable, executing the pause command;
- and
- in response to determining the sub-phase being executed is not pausable, delaying executing the pause command.
The method of clam 8, wherein in the pause command is generated in response to detecting a drop in a supply voltage level.
Dependencies are inferred from the claim text.