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US 8,897,068 B2Granted
Semiconductor memory device
AssigneeSK hynix Inc.
InventorsBeom Sik Kim, Young Soo Park
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes a memory cell array configured to include a plurality of memory blocks, a voltage generator configured to output operating voltages for data input and output to global lines, and a row decoder configured to transfer the operating voltages to local lines of a memory block, selected from among the plurality of memory blocks, and supply a ground voltage to local lines of unselected memory blocks in response to address signals.
Claims18
A semiconductor memory device, comprising:
- a memory cell array configured to comprise a plurality of memory blocks;
- a voltage generator configured to output operating voltages for data input and output to global lines;
- and
- a row decoder configured to transfer the operating voltages to local lines of a memory block, selected from among the plurality of memory blocks, and including transistors connected between local lines of the plurality of memory blocks and ground terminal,
- wherein the row decoder operates the transistors connected between the local lines of unselected memory blocks and the ground terminal in response to block select signals so as to supply a ground voltage to the local lines of the unselected memory blocks.
2 more elements
A semiconductor memory device, comprising:
- a plurality of memory planes each configured to comprise a plurality of memory blocks;
- and
- a row decoder configured to transfer operating voltages to local lines of memory blocks, selected from among memory blocks of the plurality of memory planes, respectively, and including transistors connected between local lines of the plurality of memory blocks and ground terminal,
- wherein the row decoder operates the transistors connected between the local lines of unselected memory blocks and the ground terminal in response to address signals so as to supply a ground voltage to the local lines of the unselected memory blocks, and
- wherein the ground voltage is supplied to a bulk in which the memory planes are formed in a standby mode.
2 more elements
A method of supplying voltages to memory cells comprises:
- providing operating voltages to local lines of at least one memory block, where the at least one memory block is selected from a plurality of memory blocks, where a plurality of memory planes include the plurality of memory blocks;
- supplying a ground voltage to the local lines of unselected memory blocks, where the operating voltages are transferred in response to address signals;
- and
- supplying the ground voltage to a bulk of a memory plane not including the selected memory block.
1 more element
Dependencies are inferred from the claim text.