Heterogeneous programmable device and configuration software adapted therefor

A programmable integrated circuit device programmed with a user logic design, said programmed programmable integrated circuit device comprising:

• a first portion of programmable logic resources operating at a first data rate and a second portion of said programmable logic resources operating at a second data rate lower than said first data rate;
• wherein:
• cyclic logic paths in said user logic design are programmed in said first portion of said programmable logic resources;
• unidirectional logic paths in said user logic design are programmed in said second portion of said programmable logic resources;
• and
• said unidirectional logic paths in said second portion of said programmable logic resources are pipelined to compensate for said lower second data rate.

A non-transitory machine readable storage medium encoded with instructions for performing a method of configuring a programmable integrated circuit device with a user logic design, said instructions comprising:

• instructions to analyze said user logic design to identify unidirectional logic paths within said user logic design and cyclic logic paths within said user logic design;
• instructions to assign said cyclic logic paths to logic in a first portion of said programmable integrated circuit device that operates at a first data rate, and to assign said unidirectional logic paths to logic in a second portion of said programmable integrated circuit device that operates at a second data rate lower than said first data rate;
• and
• instructions to pipeline said unidirectional logic paths in said second portion of said programmable integrated circuit device to compensate for said lower second data rate.