Semiconductor modules
AssigneeSK hynix Inc.
InventorTae Jin Kang
Life of this patent
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Abstract
Semiconductor modules are provided. The semiconductor module includes semiconductor chips with one or more ranks. The semiconductor module includes a mode register configured for storing a first information signal whose logic level is set or determined according to a number of the ranks and an on-die termination (ODT) controller configured for generating an internal control signal for activating an ODT circuit in response to the first information signal. The internal control signal is enabled during a read operation or disabled during a write operation.
Claims18
A semiconductor module including semiconductor chips with one or more ranks, the semiconductor module comprising:
- a mode register configured for storing a first information signal whose logic level is set or determined according to a number of the ranks;
- and
- an on-die termination (ODT) controller configured for receiving a write enable signal and a read enable signal to generate an internal control signal for activating an ODT circuit in response to the first information signal,
- wherein the internal control signal is enabled during a read operation or disabled during a write operation, and
- wherein the write enable signal is enabled during a write operation and the read enable signal is enabled during a read operation.
A semiconductor module including semiconductor chips with one or more ranks, the semiconductor module comprising:
- a mode register configured for extracting a first information signal and a second information signal from an internal address signal to store the first and second information signals therein;
- a control signal receiver configured for receiving an external control signal through an ODT pad in response to the second information signal;
- and
- an on-die termination (ODT) controller generating an internal control signal in response to the first and second information signals and receiving the internal control signal or the external control signal as an input signal to generate an ODT enable signal for activating an ODT circuit.
Dependencies are inferred from the claim text.