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US 8,896,332 B2Granted
Test apparatus with voltage margin test
AssigneeAdvantest Corporation
InventorsMasahiro Ishida, Daisuke Watanabe, Toshiyuki Okayasu, Kiyotaka Ichiyama
Life of this patent
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Abstract
A pattern generator generates a pattern signal which represents a test signal to be supplied to a DUT. A driver generates a test signal having a level that corresponds to the pattern signal, and outputs the test signal thus generated to the DUT. A voltage modulator changes, in a predetermined voltage range, the voltage level of the test signal output from the driver DR.
Claims19
A test apparatus configured to supply a test signal to a device under test, the test apparatus comprising:
- a pattern generator configured to generate a pattern signal which represents a test signal to be supplied to the device under test;
- a driver configured to generate the test signal and to output the test signal thus generated to the device under test, the test signal changing between at least two voltage levels based on said pattern signal;
- and
- a voltage modulator configured to change each of the voltage levels of the test signal within a respective predetermined voltage range to test a voltage margin of the device under test.
1 more element
A test method for a device under test, comprising:
- generating a pattern signal by a pattern generator, wherein the pattern signal represents a test signal to be supplied to the device under test;
- generating the test signal by a driver, and outputting the test signal thus generated to the device under test, the test signal changing between at least two voltage levels based on said pattern signal;
- and
- changing each of the voltage levels of the test signal within a respective predetermined voltage range to test a voltage margin of the device under test.
1 more element
Dependencies are inferred from the claim text.