Variable capacitance circuit
AssigneeFujitsu Semiconductor Limited
InventorHiroyuki Nakamoto
Life of this patent
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Abstract
A variable capacitance circuit includes: a prescribed node, to which an alternate current signal with a reference potential as a center voltage is applied; a first capacitor connected to the prescribed node; a second capacitor connected between the first capacitor and the reference potential; a third capacitor and a transistor for controlling capacitance, provide between a first node between the second capacitor and the first capacitor, and the reference potential; and a bias circuit which applies a first bias voltage to a second node between the third capacitor and the transistor.
Claims9
A variable capacitance circuit comprising:
- a first node, to which an alternate current signal with a reference potential as a center voltage is applied;
- a first capacitor having a first electrode connected to the first node and a second electrode connected to a second node which is different from the first node;
- a second capacitor having a first electrode connected to the second node, and a second electrode connected to a reference potential terminal to which the reference potential is applied;
- a third capacitor having a first electrode connected to the second node, and a second electrode connected to a third node which is different from the first node and the second node;
- a transistor for controlling a capacitance, having a drain connected to the third node, a source connected to the reference potential terminal, and a gate to which a capacitance control signal is applied;
- and
- a bias circuit which applies a first bias voltage to the third node.
Dependencies are inferred from the claim text.