Semiconductor device and manufacturing method for the same
AssigneeRenesas Electronics Corporation
InventorsRyo Mori, Kazuki Fukuoka, Naozumi Morino, Yoshinori Deguchi
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Abstract
A semiconductor device includes a substrate including a circuit region where a circuit element is formed, a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated, and an electrode pad that is formed on the multilayer wiring layer. An interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in the region the electrode pad and the first circuit region overlapping each other in a planar view of the electrode pad.
Claims15
A semiconductor device comprising:
- a substrate including a first circuit region, a first circuit element being formed in the first circuit region;
- a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated;
- and
- an electrode pad that is formed on the multilayer wiring layer,
- wherein an interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in a region in which the electrode pad and the first circuit region overlap each other in a planar view of the electrode pad,
- wherein the substrate further includes a second circuit region where a second circuit element is formed that is less susceptible to stress as compared to the first circuit element, and
- wherein the electrode pad overlaps the first circuit region and the second circuit region in the planar view of the electrode pad.
A manufacturing method for a semiconductor device comprising:
- forming a first circuit element in a first circuit region of a substrate;
- forming a multilayer wiring layer on the substrate, the multilayer wiring layer being composed of a plurality of wiring layers and a plurality of via layers that are alternately laminated;
- and
- forming an electrode pad on the multilayer wiring layer;
- forming a second circuit element in a second circuit region of the substrate, the second circuit element being less susceptible to stress than the first circuit element;
- and
- forming the electrode pad to overlap the first circuit region and the second circuit region in the planar view of the electrode pad,
- wherein at the time of forming the multilayer wiring layer, an interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in a region the electrode pad and the first circuit region overlap each other in a planar view of the electrode pad.
Dependencies are inferred from the claim text.