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US 8,896,127 B2Granted
Via structure and via etching process of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Pin Chang, Wen-Chih Chiou, Chen-Hua Yu
Life of this patent
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Abstract
An integrated circuit structure includes a semiconductor substrate and a hard mask layer formed on the semiconductor substrate. The integrated circuit structure further includes at least a conductive layer formed in the hard mask layer and a via extending from the hard mask layer to at least a portion of the semiconductor substrate, wherein the via has a round corner and a tapered sidewall.
Claims20
An integrated circuit structure, comprising:
- a semiconductor substrate;
- a hard mask layer formed on the semiconductor substrate;
- at least a conductive layer formed in the hard mask layer;
- and
- a via extending from the hard mask layer to at least a portion of the semiconductor substrate, wherein the via has a round corner and a tapered sidewall.
2 more elements
An integrated circuit structure, comprising:
- a semiconductor substrate;
- a hard mask layer formed on the semiconductor substrate;
- a via extending from the hard mask layer to at least a portion of the semiconductor substrate, wherein the via has a round corner and a tapered sidewall;
- a conductive material disposed in the via;
- and
- an insulating material between sidewalls of the conductive material and sidewalls of the via.
3 more elements
An integrated circuit structure, comprising:
- a semiconductor substrate;
- a hard mask layer formed on the semiconductor substrate;
- a conductive contact extending from the hard mask layer to at least a portion of the semiconductor substrate, wherein the conductive contact has a round corner and a tapered sidewall;
- and
- an insulating material between sidewalls of the conductive contact and the semiconductor substrate.
2 more elements
Dependencies are inferred from the claim text.