Microelectronic package and method of manufacturing same
AssigneeIntel Corporation
InventorsRavi K. Nalla, Mathew J. Manusharow, Drew W. Delaney
Life of this patent
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AssigneeIntel Corporation
InventorsRavi K. Nalla, Mathew J. Manusharow, Drew W. Delaney
Estimating the term…
A microelectronic package includes a substrate (110), a die (120) embedded within the substrate, the die having a front side (121) and a back side (122) and a through-silicon-via (123) therein, build-up layers (130) built up over the front side of the die, and a power plane (140) in physical contact with the back side of the die. In another embodiment, the microelectronic package comprises a substrate (210), a first die (220) and a second die (260) embedded in the substrate and having a front side (221, 261) and a back side (222, 262) and a through-silicon-via (223, 263) therein, build-up layers (230) over the front sides of the first and second dies, and an electrically conductive structure (240) in physical contact with the back sides of the first and second dies.
A microelectronic package comprising:
A method of manufacturing a microelectronic package, the method comprising:
Dependencies are inferred from the claim text.