US 8,896,109 B2 · Semiconductor device and method of forming different height conductive pillars to electrically interconnect stacked laterally offset semiconductor die

Abstract

A semiconductor device has a first semiconductor die mounted over a carrier. Wettable contact pads can be formed over the carrier. A second semiconductor die is mounted over the first semiconductor die. The second die is laterally offset with respect to the first die. An electrical interconnect is formed between an overlapping portion of the first die and second die. A plurality of first conductive pillars is disposed over the first die. A plurality of second conductive pillars is disposed over the second die. An encapsulant is deposited over the first and second die and first and second conductive pillars. A first interconnect structure is formed over the encapsulant, first conductive pillars, and second die. The carrier is removed. A second interconnect structure is formed over the encapsulant, second conductive pillars, and first die. A third conductive pillar is formed between the first and second build-up interconnect structures.

Claims24

Dependent claims

A semiconductor device, comprising:

a first semiconductor die;
a second semiconductor die disposed over a portion of the first semiconductor die and laterally offset from the first semiconductor die;
a plurality of first conductive pillars disposed over the first semiconductor die;
an encapsulant deposited over the first semiconductor die;
an insulating layer formed on the encapsulant;
and
an electrical interconnect formed between the portion of the first semiconductor die and the second semiconductor die.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application

13/684,055Filed 21 Nov 2012 · division

Priority

3 Sep 2010

Published

US 2013/0075903 A128 Mar 2013

Granted

25 Nov 2014

Term ends

Not estimatedThe source records don’t support an estimate.

Classification33 codes

H10W 90/701
Package configurations: characterised by the relative positions of pads or connectors relative to package parts
H10W 70/09
By depositing layers on the chip or wafer, e.g. "chip-first" RDLs: extending onto an encapsulation that laterally surrounds the chip or wafer,…
H10W 70/614
For connecting multiple chips together: the multiple chips being integrally enclosed
H10W 72/0198
Manufacture or treatment: batch processes

Semiconductor device and method of forming different height conductive pillars to electrically interconnect stacked laterally offset semiconductor die

Life of this patent

Semiconductor device and method of forming different height conductive pillars to electrically interconnect stacked laterally offset semiconductor die

Life of this patent

Abstract

Claims24