Die edge sealing structures and related fabrication methods

A die structure comprising:

• a diced portion of a semiconductor substrate including a first layer of semiconductor material, a buried layer of dielectric material, and a handle layer of semiconductor material, the buried layer overlying the handle layer and the first layer overlying the buried layer, the diced portion including a device region of the first layer, the device region having one or more semiconductor devices fabricated thereon;
• a sealing structure within the first layer of the semiconductor substrate and the buried layer of dielectric material, the sealing structure circumscribing the device region and contacting the handle layer;
• and
• a contact region within the first layer of the device region, wherein:
• the contact region is electrically connected to the sealing structure;
• the contact region and the first layer have a first conductivity type;
• and
• the sealing structure and the handle layer have a second conductivity type.

A device comprising:

• a semiconductor substrate including a handle layer of semiconductor material, a buried layer of dielectric material on the handle layer, and a first layer of semiconductor material on the buried layer;
• a sealing structure within the semiconductor substrate, the sealing structure circumscribing a device region of the semiconductor substrate between the device region and an edge region of the semiconductor substrate;
• and
• a crackstop structure overlying the sealing structure, the crackstop structure providing an electrical interconnection between the first layer and the sealing structure, wherein the sealing structure electrically connects the crackstop structure to the handle layer to provide a voltage of the handle layer as a reference voltage for the device region.

A device comprising:

• a semiconductor substrate including a handle layer of semiconductor material, a buried layer of dielectric material on the handle layer, and a first layer of semiconductor material on the buried layer;
• a sealing structure within the semiconductor substrate between a device region of the semiconductor substrate and an edge region of the semiconductor substrate;
• a crackstop structure overlying the sealing structure, wherein the sealing structure electrically connects the crackstop structure to the handle layer;
• and
• an outer crackstop structure on the edge region of the semiconductor substrate, the outer crackstop structure circumscribing the crackstop structure.