Method of forming via holes
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWen-Kuo Hsieh, Marowen Ng, Ming-Chung Liang, Hsin-Yi Tsai
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWen-Kuo Hsieh, Marowen Ng, Ming-Chung Liang, Hsin-Yi Tsai
Estimating the term…
A method for forming vias and trenches for an interconnect structure on a substrate includes exposing via pitch reduction patterns in a photoresist layer, developing the patterns to remove the via pitch reduction patterns, etching the photoresist layer partially using a polymer gas to reshape the pattern into small via shapes, and etching the remaining photoresist layer to extend the reshaped pattern. The reshaped small via shape patterns have a smaller pitch than the via pitch reduction patterns in a long direction. For via pitch reduction patterns having two vias each, the pattern has a peanut-shape. During the reshaping etch operation, the polymer gas deposits more in a pinched-in middle section while allowing downward etch in unpinched sections.
A method of forming via holes, said method comprising:
A method of forming via holes, said method comprising:
A method of forming via holes, said method comprising:
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