Epitaxial Process of forming stress inducing epitaxial layers in source and drain regions of PMOS and NMOS structures

An epitaxial process, comprising:

• forming a first gate and a second gate on a substrate;
• forming two first spacers on the substrate beside the first gate and the second gate respectively;
• forming two first epitaxial layers having first profiles in the substrate beside the two first spacers respectively;
• forming a second spacer material covering the first gate and the second gate;
• etching the second spacer material covering the second gate to form a second spacer on the substrate beside the second gate and expose the first epitaxial layer beside the second spacer while reserving the second spacer material covering the first gate;
• and
• replacing the exposed first epitaxial layer in the substrate beside the second spacer by a second epitaxial layer having a second profile different from the first profile, wherein the first epitaxial layers comprise bottom buffer layers, and the bottom buffer layer of the exposed first epitaxial layer remains while the exposed first epitaxial layer is replaced by the second epitaxial layer to serve as a bottom buffer layer of the second epitaxial layer.