Method of co-integration of strained-Si and relaxed Si or strained SiGe FETs on insulator with planar and non-planar architectures

A method of forming a semiconductor device comprising:

• providing a substrate including a biaxially strained semiconductor layer present directly on a dielectric layer;
• patterning the biaxially strained semiconductor layer to provide a first conductivity region of a laterally relaxed semiconductor fin structures and a second conductivity region of uniaxially strained semiconductor fin structures, wherein the laterally relaxed semiconductor fin structures are present over an undercut region in the dielectric layer;
• applying a hydrogen anneal to the first and second conductivity regions, wherein the laterally relaxed semiconductor fin structures are relaxed to an unstrained state and the uniaxially strained semiconductor fin structures in the second conductivity region remains strained;
• filling the undercut region with a dielectric material;
• and
• forming a first finFET semiconductor device of a first conductivity in the first conductivity region and a second finFET semiconductor device of a second conductivity in the second conductivity region.

A method of forming a semiconductor device comprising:

• providing a substrate including a biaxially strained semiconductor layer of a first composition present directly on a dielectric layer;
• patterning the biaxially strained semiconductor layer to provide a first conductivity region of a laterally relaxed semiconductor portion and a second conductivity region of a biaxially strained semiconductor portion, the laterally relaxed semiconductor portion is present over an undercut region in the dielectric layer;
• applying a hydrogen anneal to the first and second conductivity region, wherein the laterally relaxed semiconductor portion is relaxed to an unstrained semiconductor layer and the biaxially strained semiconductor portion in the second conductivity region remains strained;
• filling the undercut region with a dielectric material;
• forming a strained semiconductor layer of a second composition on the unstrained semiconductor layer;
• and
• forming a first semiconductor device of a first conductivity in the first conductivity region and a second semiconductor device of a second conductivity in the second conductivity region.

A method of forming a semiconductor device comprising:

• providing a substrate including a biaxially strained semiconductor layer of a first composition present directly on a dielectric layer;
• patterning the biaxially strained semiconductor layer to provide a first conductivity region of laterally relaxed semiconductor fin structures and a second conductivity region of uniaxially strained semiconductor fin structures, wherein the laterally relaxed semiconductor fin structures are present over an undercut region in the dielectric layer;
• applying a hydrogen anneal to the first and second conductivity region, wherein the laterally relaxed semiconductor fin structures are relaxed to a unstrained semiconductor fin structure, wherein the uniaxially strained semiconductor fin structures in the second conductivity region remain strained;
• filling the undercut region with a dielectric material;
• forming a strained semiconductor layer of a second composition on the unstrained semiconductor fin structures;
• and
• forming a first finFET semiconductor device of a first conductivity in the first conductivity region and a second finFET semiconductor device of a second conductivity in the second conductivity region.