Vertical conduction power electronic device and corresponding realization method

A method for forming an electronic device comprising:

• growing an epitaxial layer on a semiconductor substrate;
• forming respective gate, source and drain areas in the epitaxial layer;
• the respective gate, source and drain areas being formed as a set of modular areas extending parallel to each other, each modular area having the source area with a rectangular elongate shape, and the source area perimetrically surrounded by the gate area and the drain area, the drain area being defined by first regions and second regions, the first regions of the drain area extending parallel to one another and separating adjacent one of the modular areas, and the second regions of the drain area extending parallel to one another and contacting ends of the first regions of the drain area;
• and
• forming a sinker structure in the epitaxial layer and located directly below both the first regions and second regions of the drain area.

A method for making an electronic device comprising:

• forming respective source, gate and drain areas in an epitaxial layer;
• the respective gate, source and drain areas being formed as a set of modular areas extending parallel to each other, each modular area having the source area with a rectangular elongate shape, and the source area perimetrically surrounded by the gate area and the drain area, the drain area being defined by first regions and second regions, the first regions of the drain area extending parallel to one another and separating adjacent one of the modular areas, and the second regions of the drain area extending parallel to one another and contacting ends of the first regions of the drain area;
• and
• forming a sinker structure in the epitaxial layer and located directly below both the first regions and second regions of the drain area.