Silicon wafer and manufacturing method thereof
AssigneeSumco Corporation
InventorsToshiaki Ono, Wataru Ito, Jun Fujise
Life of this patent
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Abstract
A method of manufacturing a silicon wafer provides a silicon wafer which can reduce the precipitation of oxygen to prevent a wafer deformation from being generated and can prevent a slip extension due to boat scratches and transfer scratches serving as a reason for a decrease in wafer strength, even when the wafer is provided to a rapid temperature-rising-and-falling thermal treatment process.
Claims8
A method of manufacturing a silicon epitaxial wafer which is provided to a semiconductor device manufacturing process having a thermal treatment process of which the highest temperature ranges from 1050° C. to the melting point of silicon and of which the temperature rising and falling rate ranges from 150° C./sec to 10000° C./sec, the method comprising:
- an epitaxial process to cause an epitaxial layer to grow on the surface of a substrate, which is doped with boron so as to have resistivity of 0.02 Ωcm to 0.001 Ωcm and of which the initial oxygen concentration Oi is in the range of 11.0×1017 to 9.5×1017 atoms/cm3 (ASTM F 121, 1970-1979 published by American Society for Testing and Materials International),
- wherein the thermal treatment process is applied to only an outermost surface layer of the silicon epitaxial wafer,
- the oxygen precipitates density is equal to or less than 5×104 pcs/cm2 in the silicon epitaxial wafer,
- an oxygen precipitation nuclei dissolution process is not performed before the epitaxial process, and
- wherein the wafer includes a front surface and a back surface, both having a flat main surface, a front sloped chamfered portion having an angle θ1, which is in the range of from 10° to 50°, a back sloped chamfered portion having an angle θ2, which is in the range of from 10° to 30°, and front and back curved portions, which connect the front and back chamfered portions to a peripheral edge of the wafer.
A method of manufacturing a silicon epitaxial wafer which is provided to a semiconductor device manufacturing process having a thermal treatment process of which the highest temperature ranges from 1050° C. to the melting point of silicon and of which the temperature rising and falling rate ranges from 150° C./sec to 10000° C./sec, the method comprising:
- an epitaxial process to cause an epitaxial layer to grow on the surface of a substrate, which is doped with boron so as to have resistivity of 0.02 Ωcm to 0.001 Ωcm and of which the initial oxygen concentration Oi is in the range of 11.0×1017 to 18×1017 atoms/cm3 (ASTM F 121, 1970-1979 published by American Society for Testing and Materials International);
- and
- an oxygen precipitation nuclei dissolution process of thermally treating the substrate in a treatment temperature range of 1150° C. to 1300° C., a retention time range of 5 sec to 1 min, and a temperature-falling rate range of 10° C./sec to 0.1° C./sec before the epitaxial process,
- wherein the thermal treatment process is applied to only an outermost surface layer of the silicon epitaxial wafer,
- the oxygen precipitation nuclei dissolution process is performed to achieve an oxygen precipitates density of equal to or less than 5×104 pcs/cm2 in the silicon epitaxial wafer,
- the treatment atmosphere in the oxygen precipitation nuclei dissolution process is set to an atmosphere of non-oxidizing gas not containing nitrogen, and
- wherein the wafer includes a front surface and a back surface, both having a flat main surface, a front sloped chamfered portion having an angle θ1, which is in the range of from 10° to 50°, a back sloped chamfered portion having an angle θ2, which is in the range of from 10° to 30°, and front and back curved portions, which connect the front and back chamfered portions to a peripheral edge of the wafer.
Dependencies are inferred from the claim text.