Heating plate with planar heater zones for semiconductor processing
AssigneeLam Research Corporation
InventorsHarmeet Singh, Keith Gaff, Neil Benjamin, Keith Comendant
Life of this patent
Estimating the term…
Abstract
A heating plate of a semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a first layer with an array of heater zones operable to tune a spatial temperature profile on the semiconductor substrate, and a second layer with one or more primary heaters to provide mean temperature control of the semiconductor substrate. The heating plate can be incorporated in a substrate support wherein a switching device independently supplies power to each one of the heater zones to provide time-averaged power to each of the heater zones by time divisional multiplexing of the switches.
Claims20
A heating plate configured to provide radial and azimuthal temperature control of a semiconductor substrate supported on a semiconductor substrate support in a processing chamber, comprising:
- a first layer having an array of heater zones operable to tune a spatial temperature profile on the semiconductor substrate, the heater zones powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones, each heater zone not larger than four device dies being manufactured on the semiconductor substrate, and
- a second layer having one or more primary heaters operable to provide mean temperature control of the semiconductor substrate during processing in the processing chamber.
A substrate support comprising:
- a heating plate configured to provide radial and azimuthal temperature control of a semiconductor substrate supported on a semiconductor substrate support in a processing chamber, comprising:
- a first layer having an array of heater zones operable to tune a spatial temperature profile on the semiconductor substrate, the heater zones powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones, each heater zone not larger than four device dies being manufactured on the semiconductor substrate, and
- a second layer having one or more primary heaters operable to provide mean temperature control of the semiconductor substrate during processing in the processing chamber;
- a switching device which independently supplies power to each one of the heater zones via one of the power supply lines and one of the power return lines to provide time-averaged power to each of the heater zones by time divisional multiplexing of the switches;
- and
- a temperature controlled and radio frequency (RF) powered base plate beneath the heating plate and high side circuitry housed in local faraday cage under the base plate.
A heating plate configured to provide radial and azimuthal temperature control of a semiconductor substrate supported on a semiconductor substrate support in a processing chamber, comprising:
- a first layer having an array of heater zones operable to tune a spatial temperature profile on the semiconductor substrate, the heater zones powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones, each heater zone not larger than four device dies being manufactured on the semiconductor substrate;
- a second layer having one or more primary heaters operable to provide mean temperature control of the semiconductor substrate during processing in the processing chamber;
- the heating plate includes a first electrically insulating layer with planar heater zones distributed laterally across the first electrically insulating layer and comprising at least first, second, third and fourth planar heater zones, each planar heater zone having one or more heater elements;
- the power supply lines comprise at least a first electrically conductive power supply line electrically connected to the first and second planar heater zones and a second electrically conductive power supply line electrically connected to the third and fourth planar heater zones;
- and
- the power return lines comprise at least a first electrically conductive power return line electrically connected to the first and third planar heater zones and a second electrically conductive power return line electrically connected to the second and fourth planar heater zones.
A heating plate configured to provide radial and azimuthal temperature control of a semiconductor substrate supported on a semiconductor substrate support in a processing chamber, comprising:
- a first layer having an array of heater zones operable to tune a spatial temperature profile on the semiconductor substrate, the heater zones powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones, each heater zone not larger than four device dies being manufactured on the semiconductor substrate;
- a second layer having one or more primary heaters operable to provide mean temperature control of the semiconductor substrate during processing in the processing chamber;
- the heater zones are supported on a first electrically insulating layer;
- the second layer is arranged above or below the first electrically insulating layer;
- and
- the one or more primary heaters are electrically insulated from the array of heater zones, the power supply lines, and the power return lines.
A substrate support, comprising:
- a heating plate configured to provide radial and azimuthal temperature control of a semiconductor substrate supported on a semiconductor substrate support in a processing chamber, comprising:
- a first layer having an array of heater zones operable to tune a spatial temperature profile on the semiconductor substrate, the heater zones powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones, each heater zone not larger than four device dies being manufactured on the semiconductor substrate, and
- a second layer having one or more primary heaters operable to provide mean temperature control of the semiconductor substrate during processing in the processing chamber;
- and
- an electrostatic clamping (ESC) layer above the heating plate.
Dependencies are inferred from the claim text.