Stacked fan-out semiconductor chip
AssigneeIntel Mobile Communications GmbH
InventorsThorsten Meyer, Gerald Ofner, Sven Albers
Life of this patent
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Abstract
A stacked semiconductor device and method of manufacturing a stacked semiconductor device are described. The semiconductor device may include a reconstituted base layer having a plurality of embedded semiconductor chips. A first redistribution layer may contact the electrically conductive contacts of the embedded chips and extend beyond the boundary of one or more of the embedded chips, forming a fan-out area. Another chip may be stacked above the chips embedded in the base layer and be electrically connected to the embedded chips by a second redistribution layer. Additional layers of chips may be included in the semiconductor device.
Claims10
A semiconductor device, comprising:
- a base layer having a first semiconductor chip, the first semiconductor chip having at least one electrically conductive contact at a first side of the first semiconductor chip, wherein the first semiconductor chip is attached directly to the base layer;
- a first redistribution layer contacting the at least one electrically conductive contact of the first semiconductor chip, wherein the first redistribution layer extends beyond the boundary of the first semiconductor chip;
- a second semiconductor chip having a first side and a second side, the second semiconductor chip having at least one electrically conductive contact at the first side of the second semiconductor chip;
- an electrically insulating layer positioned to at least partially encapsulate the second semiconductor chip, wherein the electrically insulating layer has at least one via exposing the first redistribution layer;
- and
- an adhesive layer positioned between the first side of the first semiconductor chip and the second side of the second semiconductor chip, wherein the second semiconductor chip is positioned directly on the adhesive layer.
Dependencies are inferred from the claim text.