Sequential analog/digital conversion and multiplication

An apparatus for sequential analog/digital conversion and multiplication, said apparatus comprising:

• conversion circuitry for converting an analog input to a digital output, said digital output comprising a plurality of bits, said conversion circuitry configured to resolve one or more bits in succession starting from a first bit by processing said analog input to determine the manner in which to resolve each said one or more bits, said converter circuitry completing the conversion subsequent to resolving a last bit resulting in said digital output becoming indicative of said analog input;
• first speculation circuitry configured, for each resolution, to process a digital operand thereby generating at least one current speculative partial product;
• second speculation circuitry configured, for each resolution, to combine a previous partial result with each current speculative partial product thereby generating at least one current speculative partial result and a previous partial result weighted by two raised to an integer power;
• and
• selection circuitry configured, for each resolution, to generate a current partial result by choosing either said weighted previous partial result or one current speculative partial result in response to a corresponding determination by said conversion circuitry;
• whereby the current partial result is determined to be a digital product equal to the product formed by multiplying said digital operand with said digital output indicative of said analog input prior to the resolution of said last bit of said digital output.