System and method to reduce memory access latencies using selective replication across multiple memory ports

A system comprising:

• a plurality of memory ports, the plurality of memory ports distributed into a plurality of subsets, each subset identified by a subset index;
• a first address hashing unit configured to receive a request including at least one virtual memory address, each virtual memory address associated with a replication factor, the virtual memory address referring to data, translate the replication factor into a corresponding subset index based on the virtual memory address, and convert the virtual memory address to a hardware based memory address, the hardware based address referring to data in at least one of the memory ports within a subset indicated by the corresponding subset index;
• and
• a memory replication controller configured to direct requests to the hardware based address to the plurality of memory ports within the subset indicated by the corresponding subset index.