Gate structure for semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTsung-Lin Lee, Feng Yuan, Chih Chieh Yeh, Wei-Jen Lai
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Abstract
A semiconductor device and method of fabricating thereof is described that includes a substrate having a fin with a top surface and a first and second lateral sidewall. A hard mask layer may be formed on the top surface of the fin (e.g., providing a dual-gate device). A gate dielectric layer and work function metal layer are formed on the first and second lateral sidewalls of the fin. A silicide layer is formed on the work function metal layer on the first and the second lateral sidewalls of the fin. The silicide layer may be a fully-silicided layer and may provide a stress to the channel region of the device disposed in the fin.
Claims17
A semiconductor device, comprising:
- a substrate including a first fin, wherein the first fin includes a top surface and a first and second lateral sidewall;
- a hard mask layer formed on the top surface of the first fin;
- a gate dielectric layer formed on the hard mask layer and the first and second lateral sidewalls of the first fin;
- a work function metal layer formed on the gate dielectric layer on the first and the second lateral sidewalls of the first fin;
- a silicide layer formed directly on the work function metal layer on the first and the second lateral sidewalls of the first fin, wherein the silicide layer is not formed on the top surface of the first fin;
- and
- a metal fill layer disposed on the silicide layer.
A method of semiconductor fabrication, comprising:
- providing a semiconductor substrate having a first fin and a second fin;
- forming a hard mask layer on a top surface of the first fin and the second fin;
- forming a work function metal layer on the first and second fin;
- forming at least one layer that includes silicon on the work function metal layer wherein the forming the at least one layer that includes silicon includes partially etching a polysilicon layer formed on the first fin and the second fin to form an etched polysilicon layer;
- performing a silicide process on the at least one layer that includes silicon including transforming the etched polysilicon layer to a silicide material to form a silicide layer;
- and
- forming a fill metal layer on the silicide layer.
A method of fabricating a fin-type field effect transistor (finFET) device, comprising:
- providing a first fin and a second fin extending from a substrate, wherein an isolation structure interposes the first and second fin;
- forming a first gate structure interfacing the sidewalls of the first fin;
- forming a second gate structure interfacing the sidewalls of the second fin,
- wherein the forming the first gate structure and the second gate structure each include forming a fully-silicided layer of the first gate structure and the second gate structure, and wherein the fully-silicided layer provides a stress to a channel region of the first fin and the second fin, wherein the forming the fully-silicide layer includes:
- depositing a silicon layer on the substrate;
- partially etching the silicon layer to form a target layer;
- and
- performing a silicidation process on the target layer to form the fully-silicide layer.
Dependencies are inferred from the claim text.