Semiconductor device and method of forming high routing density BOL BONL and BONP interconnect sites on substrate

A method of making a semiconductor device, comprising:

• providing a semiconductor die;
• providing a substrate;
• forming a conductive trace over the substrate including an interconnect site;
• and
• forming an interconnect structure between the semiconductor die and the interconnect site including a width of the interconnect structure greater than a width of the conductive trace, wherein a width of the interconnect site is greater than 20% and less than 80% of a width of a contact interface between the interconnect structure and a contact pad formed over the semiconductor die.

A semiconductor device, comprising:

• a semiconductor die including a contact pad;
• a substrate;
• a conductive trace formed over the substrate including an interconnect site;
• and
• an interconnect structure formed between the contact pad and the interconnect site and around the conductive trace, wherein the interconnect structure covers a first surface of the interconnect site and a second surface of the interconnect site noncoplanar with the first surface of the interconnect site and a width of the interconnect site is greater than 20% and less than 80% of a width of a contact interface between the interconnect structure and the contact pad.

A semiconductor device, comprising:

• a semiconductor die including a contact pad;
• a substrate;
• a conductive trace formed over the substrate;
• and
• an interconnect structure formed between the contact pad and an interconnect site on the conductive trace, wherein a width of the interconnect site is greater than 20% and less than 80% of a width of a contact interface between the interconnect structure and the contact pad.

A semiconductor device, comprising:

• a semiconductor die;
• a substrate;
• a conductive trace formed over the substrate including an interconnect site;
• and
• an interconnect structure formed between the semiconductor die and the interconnect site including a width of the interconnect structure greater than a width of the conductive trace, wherein a width of the interconnect site is greater than 20% and less than 80% of a width of a contact interface between the interconnect structure and a contact pad formed over the semiconductor die.