Three dimensional memory array architecture
AssigneeMicron Technology, Inc.
InventorFederico Pio
Life of this patent
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Abstract
Three dimension memory arrays and methods of forming the same are provided. An example three dimension memory array can include a stack comprising a plurality of first conductive lines separated from one another by at least an insulation material, and at least one conductive extension arranged to extend substantially perpendicular to the plurality of first conductive lines, such that the at least one conductive extension intersects a portion of at least one of the plurality of first conductive lines. Storage element material is formed around the at least one conductive extension. Cell select material is formed around the at least one conductive extension.
Claims29
A three dimension memory array, comprising:
- a stack comprising a plurality of first conductive lines at a number of levels separated from one another by at least an insulation material;
- at least one conductive extension arranged to extend substantially perpendicular to the plurality of first conductive lines, such that the at least one conductive extension intersects a portion of at least one of the plurality of first conductive lines;
- a second conductive line formed over the plurality of first conductive lines and the at least one conductive extension;
- storage element material formed around the at least one conductive extension;
- and
- cell select material formed around the at least one conductive extension.
A three dimension memory array, comprising:
- a plurality of first conductive lines arranged in a stack and located at a number of positions on each of a number of levels of the stack such that multiple ones of plurality of first conductive lines are stacked atop one another at each of the number of positions and separated from one another by at least an insulation material;
- a plurality of second conductive lines formed over the plurality of first conductive lines and arranged substantially perpendicular to the plurality of first conductive lines, wherein each of the plurality of second conductive lines is coupled to at least one conductive extension arranged to extend substantially perpendicular to the plurality of second conductive lines and the plurality of first conductive lines, such that at least a portion of the conductive extensions passes through some portion of the multiple first conductive lines stacked atop one another at a respective position;
- storage element material farmed around each of the conductive extensions;
- and
- cell select material formed around each of the conductive extensions,
- wherein each conductive extension is coupled to only one of the plurality of second conductive lines.
A three dimension memory array, comprising:
- a stack comprising a plurality of first conductive lines adjacent storage element material at a number of levels separated from one another by at least an insulation material, the storage element material protruding from each of the plurality of first conductive lines at an edge thereof;
- at least one conductive extension arranged to extend substantially perpendicular to the plurality of first conductive lines and adjacent storage element material;
- and
- cell select material formed between the storage element material protrusion and the at least one conductive extension.
A method of forming a memory array, comprising:
- forming a stack comprising a plurality of first conductive lines separated from one another by insulation material;
- forming a via through the stack such that at least a portion of the via passes through each of the plurality of first conductive lines;
- forming cell select material within the via;
- forming storage element material within the via;
- forming a conductive extension within the via such that the cell select material and the storage element material are therearound;
- and
- forming a second conductive line over the plurality of first conductive lines and the conductive extension so as to be substantially perpendicular to the first conductive lines and the conductive extension
- wherein the conductive extension is communicatively coupled to the second conductive line as an extension thereof.
Dependencies are inferred from the claim text.