Shared-diffusion standard cell architecture
AssigneeQUALCOMM Incorporated
InventorsPratyush Kamal, Esin Terzioglu, Foua Vang, Prayag Bhanubhai Patel, Giridhar Nallapati, Animesh Datta
Life of this patent
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Abstract
A semiconductor standard cell includes an N-type diffusion area and a P-type diffusion area, both extending across the cell and also outside of the cell. The cell also includes a conductive gate above each diffusion area to create a semiconductive device. A pair of dummy gates are also above the N-type diffusion area and the P-type diffusion area creating a pair of dummy devices. The pair of dummy gates are disposed at opposite edges of the cell. The cell further includes a first conductive line configured to couple the dummy devices to power for disabling the dummy devices.
Claims20
A semiconductor standard cell, comprising:
- an N-type diffusion area extending across the cell and also outside of the cell;
- a P-type diffusion area extending across the cell and also outside of the cell;
- at least one conductive gate above each diffusion area to create a semiconductive device;
- a pair of dummy gate, each dummy gate disposed above the N-type diffusion area and the P-type diffusion area to create at least a pair of dummy devices, the pair of dummy gates being disposed at opposite edges of the cell;
- and
- at least one first conductive line configured to couple at least one of the dummy devices to power for disabling the at least one dummy device.
A semiconductor cell fabrication method, comprising:
- fabricating an N-type diffusion area extending across the cell and also outside of the cell;
- fabricating a P-type diffusion area extending across the cell and also outside of the cell;
- fabricating at least one conductive gate above each diffusion area to create a semiconductive device;
- fabricating a pair of dummy gates, each dummy gate disposed above the N-type diffusion area and the P-type diffusion area to create at least a pair of dummy devices, the pair of dummy gates being disposed at opposite edges of the cell;
- and
- fabricating at least one first conductive line configured to couple at least one of the dummy devices to power for disabling the at least one dummy device.
A semiconductor standard cell, comprising:
- an N-type diffusion area extending across the cell and also outside of the cell;
- a P-type diffusion area extending across the cell and also outside of the cell;
- at least one conductive gate above each diffusion area to create a semiconductive device;
- a pair of dummy gates, each dummy gate disposed above the N-type diffusion area and the P-type diffusion area to create at least a pair of dummy devices, the pair of dummy devices being disposed at opposite edges of the cell;
- and
- at least one conductive means for coupling at least one of the dummy devices to power for disabling the at least one dummy device.
Dependencies are inferred from the claim text.