Independent write and read control in serially-connected devices

A memory device, comprising:

• a first control input port;
• a second control input port;
• a third control input port;
• a data input port;
• a data output port;
• an internal memory;
• control circuitry responsive to a control signal on the first control input port to capture command and address information via the data input port;
• wherein when the command is a read command, the control circuitry is further responsive to a read control signal on the second control input port to transfer data associated with the address information from the internal memory onto the data output port;
• and
• wherein when the command is a write command, the control circuitry is further responsive to a write control signal on the third control input port to write data captured via the data input port into the internal memory at a location associated with the address information.

A memory device connectable to a next device of a chain, comprising:

• an input/output interface;
• an internal memory;
• control circuitry;
• wherein the control circuitry is configured to recognize a command received via the interface and destined for the memory device;
• wherein when the command is a read command destined for the memory device, the control circuitry is further configured to:
• respond to a read control signal received via the interface by sending data from the internal memory towards the next device via the interface;
• and
• transfer a write control signal received via the interface towards the next device via the interface;
• wherein when the command is a write command destined for the memory device, the control circuitry is further configured to:
• respond to the write control signal by writing data captured from the interface to the internal memory;
• and
• transfer the read control signal received via the interface towards the next device via the interface.