Adding signed 8/16/32-bit integers to 64-bit integers

An apparatus for generating output computer code that includes instructions for adding a first integer of N bits to a second integer of M bits, wherein the second integer is a signed integer and wherein N is greater than M, the apparatus comprising:

• a processor configured to:
• identify a first loop construct in source computer code, wherein the first loop construct includes adding the first integer and the second integer;
• and
• generate the output computer code based on the source computer code, wherein the output computer code includes at least one instruction which, when executed, performs the following:
• storing an offset value in an N bit length register, wherein:
• the offset value is based on a length of the second integer and is used to preserve wraparound semantics for the second integer;
• and
• M and the offset value are any one of:
• M is 32 and the offset value is 0x80000000, M is 16 and the offset value is 0x8000, or M is 8 and the offset value is 0x80;
• subtracting the offset value from a first register that corresponds to the first integer;
• adding the offset value to a second register that corresponds to the second;
• performing a zero extension to the second register to convert the second integer to an N bit length;
• and
• executing a second loop construct, wherein the second loop construct includes an N-bit addition of a value in the first register and a value in the second register.

A non-transitory computer-readable medium storing a set of instructions for execution by a processor, the set of instructions comprising:

• an identifying segment for identifying a first loop construct in source computer code, wherein the first loop construct includes an addition of a first integer of N bits to a second integer of M bits, wherein the second integer is a signed integer and wherein N is greater than M;
• a generating segment for generating output computer code based on the source computer code, wherein the output computer code includes at least one instruction which, when executed, performs the following:
• storing an offset value in an N bit length register, wherein:
• the offset value is based on a length of the second integer and is used to preserve wraparound semantics for the second integer;
• and
• M and the offset value are any one of:
• M is 32 and the offset value is 0x80000000, M is 16 and the offset value is 0x8000, or M is 8 and the offset value is 0x80:
• subtracting the offset value from a first register that corresponds to the first integer;
• adding the offset value to a second register that corresponds to the second integer;
• performing a zero extension to the second register to convert the second integer to an N bit length;
• and
• executing a second loop construct, wherein the second loop construct includes an N-bit addition of a value in the first register and a value in the second register.