Electronic circuit design method

A method for replicating a critical path formed of a first assembly of critical logic cells that are series-connected between an input node and an output node, comprising:

• determining an equivalent capacitance of output logic cells connected at the outputs of critical logic cells for said critical path;
• determining a logic level for each input of the critical logic cells which is not connected to another critical logic cell of said critical path, said determined logic levels forcing a signal present at the input node to follow said path;
• arranging the first assembly on an integrated circuit chip;
• arranging on said integrated circuit chip a second assembly of control logic cells that copies the first assembly in terms of number of logic cells, type of logic cells and connection of logic cells such that each control logic cell is a homolog of a corresponding critical logic cell;
• and
• connecting charge cells at the output the control logic cells having a total equivalent capacitance equal to the determined equivalent capacitance for the output logic cells.

An integrated circuit chip, comprising:

• a critical path formed of a first assembly of critical logic cells that are series-connected between an input node and an output node;
• output logic cells connected to outputs of the critical logic cells;
• and
• a replica circuit, comprising:
• a second assembly of control logic cells that copies the first assembly in terms of number of logic cells, type of logic cells and connection of logic cells such that each control logic cell is a homolog of a corresponding critical logic cell;
• charge cells coupled at the output the control logic cells;
• wherein said charge cells have a total equivalent capacitance equal to a total equivalent capacitance of said output logic cells;
• and
• a logic level circuit connection to each input of the control logic cells which is not connected to another control logic cell of said second assembly, said logic level circuit connections configured to permit a signal present at an input of the second assembly to propagate to an output of the second assembly.