Target device providing debugging function and test system comprising the same
AssigneeSamsung Electronics Co., Ltd.
InventorsHyunsun Ahn, Jaegon Lee
Life of this patent
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Abstract
A test system for debugging a target device includes a switch unit configured to transfer a test signal to the target device, the target device including a first intellectual property (IP) block supporting a debugging operation at a normal mode and a second IP block supporting a debugging operation at a power saving mode. The switch unit is configured to form a first signal transfer path for transferring the test signal to the first IP block at the normal mode and to form a second signal transfer path for transferring the test signal to the second IP block at the power saving mode.
Claims28
A device comprising:
- a first intellectual property (IP) block configured to be powered and to perform a debugging operation at a normal mode;
- a second IP block configured to be powered to perform the debugging operation at a power saving mode;
- and
- a switch block configured to form a first signal transfer path into the first IP block at the normal mode and to form a second signal transfer path into the second IP block at the power saving mode,
- wherein the first IP block is configured not to be powered and not to perform the debugging operation while the second IP block is configured to be powered at the power saving mode.
A system comprising:
- a first test controller configured to control a first debugging operation of a first IP block;
- a second test controller configured to control a second debugging operation of a second IP block and
- a switch block configured to form a first signal transfer path into the first IP block at a normal mode and to form a second signal transfer path into the second IP block at a power saving mode,
- wherein the first IP block is configured to be powered and to perform the first debugging operation at a normal mode, the second IP block is configured to be powered to perform the second debugging operation at the power saving mode and
- wherein the first IP block is configured not to be powered and not to perform the first debugging operation while the second IP block is configured to be powered at the power saving mode.
A method of debugging a device having multiple operating power modes, the method comprising:
- setting a debugging path by selecting a first debugging path for debugging a device;
- debugging a first IP block in the device via the first debugging path coupled to a input/output terminal in a normal operation mode;
- turning off one of powers of the first IP block while a second IP block is powered in a power saving mode;
- switching the debugging path from the first debugging path to a second debugging path coupled to the input/output terminal;
- and
- debugging the second IP block in the device via the second debugging path in the power saving mode.
Dependencies are inferred from the claim text.