Memory storage device, memory controller, and method for identifying valid data

A memory controller, for managing a rewritable non-volatile memory chip in a memory storage device, wherein the rewritable non-volatile memory chip comprises a plurality of physical blocks, each of the physical blocks comprises a plurality of physical pages, and each of the physical pages comprises a data bit area and a redundant bit area, the memory controller comprising:

• a host system interface, configured to couple to a host system;
• a memory interface, configured to couple to the rewritable non-volatile memory chip;
• and
• a memory management circuit, coupled to the host system interface and the memory interface, grouping the physical blocks into at least a data area and a spare area and configuring a plurality of logical blocks to be mapped to the physical blocks in the data area, wherein each of the logical blocks comprises a plurality of logical pages,
• the memory management circuit further receives a data to be written by the host system into a specific logical page among the logical pages through the host system interface, selects a substitute physical block, writes the data into a specific physical page in the substitute physical block, and records an address of a physical page in which a previous data corresponding to the specific logical page is written into the specific physical page, wherein the substitute physical block is selected from the spare area and mapped to the logical block corresponding to the specific logical page,
• wherein the memory management circuit further identifies a first physical page among all the physical pages corresponding to the specific logical page, wherein an address of the first physical page is not recorded in the other physical pages corresponding to the specific logical page, and the memory management circuit determines that a valid data of the specific logical page is written in the first physical page.

A memory storage device, comprising:

• a rewritable non-volatile memory chip, comprising a plurality of physical blocks, wherein each of the physical blocks comprises a plurality of physical pages, and each of the physical pages comprises a data bit area and a redundant bit area;
• a connector, configured to couple to a host system;
• and
• a memory controller, coupled to the rewritable non-volatile memory chip and the connector, grouping the physical blocks into at least a data area and a spare area and configuring a plurality of logical blocks to be mapped to the physical blocks in the data area, wherein each of the logical blocks comprises a plurality of logical pages,
• the memory controller further receives a data to be written by the host system into a specific logical page among the logical pages through the connector, selects a substitute physical block, writes the data into a specific physical page in the substitute physical block, and records an address of a physical page in which a previous data corresponding to the specific logical page is written into the specific physical page, wherein the substitute physical block is selected from the spare area and mapped to the logical block corresponding to the specific logical page,
• wherein the memory controller further identifies a first physical page among all the physical pages corresponding to the specific logical page, wherein an address of the first physical page is not recorded in the other physical pages corresponding to the specific logical page, and the memory controller determines that a valid data of the specific logical page is written in the first physical page.