US 8,819,353 B2 · Host bus adapters with shared memory and battery backup

Abstract

The present disclosure includes methods and systems that share memory located on one PCIe based HBA across other PCIe based HBAs in the system. In addition, the backup battery is effectively shared across multiple PCIe based HBAs in the system. This approach saves significant costs by avoiding the need to have a separate DRAM with its own dedicated battery backup on each HBA board in the system. This also allows the redundant memory and backup batteries to be removed while still retaining the same functionality through the common DDR3 memory chip and battery backup shared across multiple HBAs in the system. The component cost for batteries and memory, management module, board space, and the board manufacturing cost are all reduced as a result.

Claims23

Dependent claims

A computer system comprising:

a motherboard comprising a host chipset operatively coupled to a plurality of peripheral component interfaces;
a first host bus adapter operatively coupled to a first peripheral component interface on the motherboard;
the first host bus adapter comprising a dynamic random access memory comprising memory address space and a processor;
a second host bus adapter operatively coupled to a second peripheral component interface, and
a memory configuration module configured to control the memory address space in the dynamic random access memory, partition the dynamic random access memory on the first host bus adapter, and allocate the partitioned dynamic random access memory for use by the first and second host bus adapters, wherein memory access to the second host bus adapter will be only mapped to the dynamic random access memory of the first host bus adapter.

2 more elements

A method for providing a host bus adapter system for a computer system, comprising:

providing a first host bus adapter configured for operable connection to a first peripheral component interface;
providing the first host bus adapter with a dynamic random access memory comprising memory address space;
providing a second host bus adapter configured for operable connection to a second peripheral component interface;
and
providing a memory configuration module configured to control the memory address space in the dynamic random access memory, partition the dynamic random access memory on the first host bus adapter, and allocate the partitioned dynamic random access memory for use by the first and second host bus adapters, wherein memory access to the second host bus adapter will be only mapped to the dynamic random access memory of the first host bus adapter.

2 more elements

Dependencies are inferred from the claim text.

Host bus adapters with shared memory and battery backup

Life of this patent

Host bus adapters with shared memory and battery backup

Life of this patent

Abstract

Claims23