FFT computing apparatus and power computing method
AssigneeNEC Corporation
InventorHiroyuki Igura
Life of this patent
Estimating the term…
Abstract
In an FFT computing apparatus, a computation-unit switching detection unit detects timing at which a complex multiplication is not being carried out in said butterfly computation of FFT computation, and a complex-multiplication power-computation unit switches computation between complex multiplication and power computation, based on a detection result by said computation-unit switching detection unit. The complex-multiplication power-computation unit performs power computation at timing at which complex multiplication is not carried out in said butterfly computation of FFT computation.
Claims10
An FFT computing apparatus comprising:
- a computation-unit switching detection unit that detects timing at which a complex multiplication is not being carried out in a butterfly computation of FFT (Fast Fourier Transform) computation;
- and
- a complex-multiplication power-computation unit that switches computation between complex multiplication and power computation, based on a detection result by said computation-unit switching detection unit, wherein
- said complex-multiplication power-computation unit performs power computation at timing at which complex multiplication is not carried out in said butterfly computation of FFT computation.
A power computation method comprising:
- detecting, by an FFT computing apparatus, timing at which complex multiplication is not carried out in a butterfly computation of FFT (Fast Fourier Transform) computation;
- and
- performing, by said FFT computing apparatus, power computation using a complex multiplier at timing at which multiplication is not being carried out in a butterfly computation of FFT computation to perform power computation simultaneously with FFT computation.
Dependencies are inferred from the claim text.