US 8,812,569 B2 · Digital filter implementation for exploiting statistical properties of signal and coefficients

Abstract

A method for implementing a digital filter is provided. The method includes (a) determining a bit-width of an incoming data sample of an incoming signal by measuring a distance between a leading zero or one of the incoming data sample and a trailing zero of the incoming data sample. The incoming data sample is obtained by sampling the incoming signal at a pre-defined time interval, (b) obtaining bit-width multipliers with variable bit-widths based on a first probability distribution function (PDF) of bit-widths of incoming data samples, (c) allocating the incoming data sample and a filter coefficient based on the bit-width of the incoming data sample and a bit-width of the filter coefficient to one bit-width multiplier of the bit-width multipliers, and (d) performing a multiply operation of a Multiply and Accumulate (MAC) operation on the one bit-width multiplier to generate an output of the digital filter.

Claims15

Dependent claims

A method for implementing a digital filter, said method comprising:

(a) determining a bit-width of an incoming data sample of an incoming signal by measuring a distance between a leading zero or one of said incoming data sample and a trailing zero of said incoming data sample, wherein said incoming data sample is obtained by sampling said incoming signal at a pre-defined time interval;
(b) obtaining a plurality of bit-width multipliers with variable bit-widths based on a first probability distribution function (PDF) for a plurality of bit-widths of a plurality of incoming data samples;
and
(c) allocating said incoming data sample and a filter coefficient, based on said bit-width of said incoming data sample and a bit-width of said filter coefficient, to one bit-width multiplier of said plurality of bit-width multipliers;
and
(d) performing a multiply operation of a Multiply and Accumulate (MAC) operation on said one bit-width multiplier to generate an output of said digital filter.

3 more elements

A system for implementing a digital filter, said system comprising:

memory that stores a plurality of incoming data samples;
and
a processor that executes a set of instructions, wherein said processor comprises at least one of:
(i) a load store unit, (ii) a Multiply and accumulate (MAC) unit, and (iii) an arithmetic unit, said set of instructions including instructions for:
(a) determining a bit-width of an incoming data sample of an incoming signal by measuring a distance between a leading zero or one of said incoming data sample and a trailing zero of said incoming data sample, wherein said incoming data sample is obtained by sampling said incoming signal at a pre-defined time interval;
(b) obtaining a plurality of bit-width multipliers with variable bit-widths based on a first probability distribution function (PDF) for a plurality of bit-widths of incoming data samples;
and
(c) allocating said incoming data sample and a filter coefficient, based on a bit-width of said incoming data sample and a bit-width of said filter coefficient, to one bit-width multiplier of said plurality of bit-width multipliers;
and
(d) performing a multiply operation of a Multiply and Accumulate (MAC) operation on said one bit-width multiplier to generate an output of said digital filter.

7 more elements

Dependencies are inferred from the claim text.

Digital filter implementation for exploiting statistical properties of signal and coefficients

Life of this patent

Digital filter implementation for exploiting statistical properties of signal and coefficients

Life of this patent

Abstract

Claims15