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US 8,806,399 B1Granted
Register retiming technique
AssigneeAltera Corporation
InventorsBabette van Antwerpen, Michael D. Hutton, Gregg William Baeckler, Jinyong Yuan
Life of this patent
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Abstract
An electronic automation system performs register retiming on a logic design, which may be a logic design for a programmable logic integrated circuit. Register retiming is a moving or rearranging of registers across combinatorial logic in a design in order to improve a maximum operating frequency or fmax. In one implementation, the system includes machine-readable code, which may be stored on a computer-readable medium such as a disk, executing on a computer. The system balances timing in order to trade off delays between critical and noncritical paths. Register retiming may make changes to a design at a gate level.
Claims20
A method comprising:
- receiving a high-level design language representation of an integrated circuit design;
- executing, using a processor, a design synthesis process on the high-level design language representation of the integrated circuit design to obtain a netlist for the integrated circuit design;
- controlling a flow of the design synthesis process using script commands provided to the design synthesis process in a script file, wherein the script commands comprise a plurality of retiming commands;
- and
- performing a retiming operation on the netlist of the integrated circuit design based on the plurality of retiming commands in the script file, wherein each of the plurality of retiming commands is associated with a different optimization of the netlist, wherein each of the different optimizations of the netlist is selected from a group consisting of handling of register power-up conditions, modifying asynchronous signals in registers, avoiding the creation of bad behavior in the integrated circuit design due to metastability, avoiding bad behavior in the integrated circuit design by retiming between unrelated clock domains, prohibiting user-specified types of retiming, creating options to prohibit user-specified types of retiming in the netlist, and inferring don't touch conditions on specific types of registers.
2 more elements
A system comprising:
- a processor;
- and
- a memory storing computer executable instructions, which, when executed by the processor, cause the system to:
- execute a design synthesis process on a high-level design language representation of an integrated circuit design to obtain a netlist for the integrated circuit design;
- control a flow of the design synthesis process using script commands provided to the design synthesis process in a script file, wherein the script commands comprise a plurality of retiming commands;
- and
- perform a retiming operation on the netlist of the integrated circuit design based on the plurality of retiming commands in the script file, wherein each of the plurality of retiming commands is associated with a different optimization of the netlist, wherein each of the different optimizations of the netlist is selected from a group consisting of handling of register power-up conditions, modifying asynchronous signals in registers, avoiding the creation of bad behavior in the integrated circuit design due to metastability, avoiding bad behavior in the integrated circuit design by retiming between unrelated clock domains, prohibiting user-specified types of retiming, creating options to prohibit user-specified types of retiming in the netlist, and inferring don't touch conditions on specific types of registers.
4 more elements
A method comprising:
- obtaining a netlist of an integrated circuit design;
- controlling a flow of the design synthesis process using script commands provided to the design synthesis process in a script file, wherein the script commands comprise a plurality of retiming commands;
- generating, using a processor, a retiming graph based on the netlist;
- determining a retiming clock period based on the retiming graph;
- and
- performing a retiming operation on the netlist of the integrated circuit design based on the plurality of retiming commands in the script file based on the retiming clock period, wherein each of the plurality of retiming commands is associated with a different optimization of the netlist, wherein each of the different optimizations of the netlist is selected from a group consisting of handling of register power-up conditions, modifying asynchronous signals in registers, avoiding the creation of bad behavior in the integrated circuit design due to metastability, avoiding bad behavior in the integrated circuit design by retiming between unrelated clock domains, prohibiting user-specified types of retiming, creating options to prohibit user-specified types of retiming in the netlist, and inferring don't touch conditions on specific types of registers.
3 more elements
Dependencies are inferred from the claim text.