Systems and methods for parallel dual-mode turbo decoders
AssigneeIntel Corporation
InventorsTao Zhang, Yuan Li, Jianbin Zhu
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntel Corporation
InventorsTao Zhang, Yuan Li, Jianbin Zhu
Estimating the term…
According to some embodiments, a turbo decoder configured for High-Speed Packet Access (HSPA) and Long Term Evolution (LTE) is provided, comprising: a plurality of maximum a posteriori (MAP) engines; a plurality of extrinsic memory banks accessible by a MAP engine of the plurality of MAP engines; and wherein when the turbo decoder is operating in HSDPA mode the plurality of extrinsic memory banks is configured such that during a first half of a decoding iteration, the MAP engine is able to read a first dataset from and write second dataset to the plurality of extrinsic memory banks in natural row and column order, and during a second half of the decoding iteration, the MAP engine is able to read a third dataset from and write a fourth dataset to the plurality of extrinsic memory banks in a predetermined row and column order in accordance with an interleaver table using a read column buffer and a write column buffer.
A system, comprising:
A method of decoding using a turbo decoder comprising N MAP engines and N extrinsic memory banks accessible by each of the N MAP engines, wherein the N extrinsic memory banks, the method comprising:
A turbo decoder comprising:
Dependencies are inferred from the claim text.