Back to results
US 8,806,263 B2Granted
Methods and apparatuses including a global timing generator and local control circuits
AssigneeMicron Technology, Inc.
InventorNicholas T. Hendrickson
Life of this patent
Estimating the term…
Abstract
Apparatus and methods are disclosed, such as a global timing generator coupled to local control circuits. Each local control circuit can control programming and reading of a memory element in a tile of memory elements in an array responsive to a timing signal(s) from the global timing generator. Additional apparatus and methods are described.
Claims19
An apparatus comprising:
- a global timing generator;
- and
- a plurality of local control circuits, each local control circuit including
- a circuit to compare a sensed state of a memory element with external data;
- and
- a pulse generator coupled to the global timing generator, the pulse generator to program the memory element responsive to a timing signal from the global timing generator if the sensed state is not the same as the external data, the pulse generator comprising:
- a first pulse reference signal source, coupled to the memory element through a first transistor circuit, to generate a voltage signal to program a first state into the memory element in response to the timing signal;
- and
- a second pulse reference signal source, coupled to the memory element through a second transistor circuit, to generate a voltage signal to program a second state that is an inverse of the first state, into the memory element in response to the timing signal.
6 more elements
A method comprising:
- comparing a sensed state of a memory element with external data in a local control circuit;
- and
- programming the memory element responsive to a timing signal from a global timing generator if the sensed state is not the same as the external data, wherein the programming further comprises:
- a first pulse reference signal source generating a first voltage signal to program a first state into the memory element responsive to the timing signal;
- and
- a second pulse reference signal source generating a second voltage signal to program a second state, inverse to the first state, into the memory element responsive to the timing signal.
3 more elements
An apparatus comprising:
- a global timing generator coupled to a plurality of local control circuits, each local control circuit to control programming and reading of a memory element in a tile of memory elements in an array of memory elements responsive to a timing signal from the global timing generator, wherein each local control circuit comprises:
- a first pulse reference signal source, coupled to the memory element through a first transistor circuit, to generate a first voltage signal to program a first state into the memory element in response to the timing signal;
- and
- a second pulse reference signal source, coupled to the memory element through a second transistor circuit, to generate a second voltage signal to program a second state that is an inverse of the first state, into the memory element in response to the timing signal.
1 more element
A method comprising:
- generating timing signals in a global timing generator for memory elements in an array of memory elements;
- providing the timing signals to a plurality of local control circuits, each local control circuit being coupled to a subset of the memory elements in the array of memory elements, wherein each local control circuit comprises first and second pulse reference signal sources that each program a different respective state into the subset of memory elements in response to the timing signals;
- and
- acting on a memory element of the array of memory elements responsive to the timing signals.
1 more element
Dependencies are inferred from the claim text.