Power delivery noise reduction on a memory channel
AssigneeIntel Corporation
InventorSanjiv C. Soman
Life of this patent
Estimating the term…
Abstract
A device, computer system, and method are disclosed. In one embodiment, the device includes a memory buffer driver circuit that can drive signals on a memory channel at a given voltage level. The voltage at the voltage level is supplied to the memory buffer driver circuit from a rail of a power delivery network. The voltage level exhibits a repeatable fluctuation cycle at a resonant frequency of the power delivery network. The device also includes an on-die termination logic circuit that asserts a first termination resistance on the memory channel after the memory channel enters an idle state but before the voltage level reaches a peak of the repeatable fluctuation cycle. The on-die termination logic circuit then deasserts the first termination resistance on the memory channel at a later point in time.
Claims20
A device, comprising:
- a memory buffer driver circuit to drive signals on a memory channel at a voltage level, the voltage level corresponding to an amount of voltage supplied to the memory buffer driver circuit from a rail of a power delivery network, wherein the voltage level exhibits a repeatable fluctuation cycle at a resonant frequency of the power delivery network;
- and
- an on-die termination logic circuit coupled to the memory channel, the on-die termination logic circuit, in response to the memory channel being in an idle state, to:
- assert a first termination resistance on the memory channel at a first point in time when the voltage level is rising towards a peak in the repeatable fluctuation cycle;
- and
- deassert the first termination resistance on the memory channel at a second point in time subsequent to the assertion and prior to the voltage level reaching a low in the repeatable fluctuation cycle that immediately follows the peak.
A computer system, comprising:
- a power delivery network to deliver power to a plurality of components in the computer system at least at a first voltage level, the power delivery network including at least a first power rail, wherein the first voltage level exhibits a repeatable fluctuation cycle at a resonant frequency of the power delivery network;
- a memory module including one or more dynamic random access memory devices;
- a memory channel to couple the memory module to a memory controller;
- and
- the memory controller, wherein the memory controller includes:
- a memory buffer driver circuit powered by the power delivery network, the memory buffer circuit to drive signals on the memory channel at the first voltage level;
- and
- an on-die termination logic circuit coupled to the memory channel, the on-die termination logic circuit, in response to the memory channel being in an idle state, to:
- assert a first termination resistance on the memory channel at a first point in time when the first voltage level is rising towards a peak in the repeatable fluctuation cycle;
- and
- deassert the first termination resistance on the memory channel at a second point in time subsequent to the assertion and prior to the first voltage level reaching a low in the repeatable fluctuation cycle that immediately follows the peak.
A method, comprising:
- driving signals on a memory channel at a voltage level, the voltage level corresponding to an amount of voltage supplied to the memory buffer driver circuit from a rail of a power delivery network, wherein the voltage level exhibits a repeatable fluctuation cycle at a resonant frequency of the power delivery network;
- and
- asserting a first termination resistance on the memory channel at a first point in time when the voltage level is rising towards a peak in the repeatable fluctuation cycle;
- and
- deasserting the first termination resistance on the memory channel at a second point in time subsequent to the assertion and prior to the voltage level reaching a low in the repeatable fluctuation cycle that immediately follows the peak.
Dependencies are inferred from the claim text.