Multiple-core processor supporting multiple instruction set architectures

A method of operating a processor integrated circuit for executing program instructions, wherein the program instructions comprise program instructions belonging to a first instruction set architecture and a second instruction set architecture distinct from the first instruction set architecture, the method comprising:

• selecting a first operating mode of the processor integrated circuit;
• responsive to selecting the first operating mode, activating a first execution core for executing program instructions of the first instruction set architecture, wherein the first execution core is incompatible with the second instruction set architecture;
• executing the program instructions of the first instruction set while the processor integrated circuit is in the first operating mode;
• selecting the second operating mode of the processor integrated circuit;
• responsive to selecting the second operating mode, deactivating the first execution core;
• further responsive to selecting the second operating mode, activating a second execution core for executing program instructions of the second instruction set architecture, wherein the second execution core is incompatible with the first instruction set architecture;
• and
• executing the program instructions of the second instruction set while the processor integrated circuit is in the second operating mode, and wherein responsive to selecting the first operating mode, the second execution core is deactivated, wherein the deactivating the first execution core comprises disabling a first power supply voltage previously provided to the first execution core, and wherein the deactivating the second execution core comprises disabling a second power supply voltage previously provided to the second execution core, wherein the program instructions of the first instruction set architecture are associated with a first virtual machine, the first virtual machine provides a first operating system environment, the program instructions of the second instruction set architecture are associated with a second virtual machine different from the first virtual machine, the second virtual machine provides a second operating system environment different from the first operating system environment.

A processing system, comprising:

• a plurality of processing cores;
• and
• a memory for storing program instructions for execution by the plurality of processing cores and storing data operated on by the processing cores, wherein the program instructions comprise program instructions belonging to a first instruction set architecture and a second instruction set architecture distinct from the first instruction set architecture, and wherein at least two of the processing cores are integrated in a processor integrated circuit that includes a first execution core for executing program instructions of the first instruction set architecture in a first operating mode, wherein the first execution core is incompatible with the second instruction set architecture, a second execution core for executing program instructions of the second instruction set architecture in a second operating mode, a control circuit coupled to the first execution core and the second execution core for exclusively selecting between the first operating mode and the second operating mode, wherein the second execution core is disabled in the first operating mode and the first execution core is disabled in the second operating mode, and a package for containing the first execution core, the second execution core and the control circuit and providing electrical terminals for interfacing the processing system to external devices, wherein the processor integrated circuit further comprises a power management unit for providing a first power supply voltage to the first execution core in the first operating, wherein the power management unit does not provide power to the first execution core in the second operating mode, and wherein the power management unit does not provide power to the second execution core in the first operating mode, the program instructions of the first instruction set architecture are associated with a first virtual machine, the first virtual machine provides a first operating system environment, the program instructions of the second instruction set architecture are associated with a second virtual machine different from the first virtual machine, the second virtual machine provides a second operating system environment different from the first operating system environment.