Multi root shared peripheral component interconnect express (PCIe) end point
AssigneeAvalanche Technology, Inc.
InventorsAnilkumar Mandapuram, Siamack Nemazie
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Abstract
A method of accessing a server address space of a shared PCIe end point system includes programming a primary address translation table with a server address of a server address space, setting up a direct memory access (DMA) to access a primary port memory map, the primary port memory map correlating with addresses in the primary address translation table, and re-directing the direct memory accesses to the primary port memory map to the server address space according to the primary address translation table.
Claims24
A method of accessing a server address space in a shared Peripheral Component Interconnect express (PCIe end point system comprising:
- initiating a memory access to at least one primary port memory map by a shared PCIe endpoint, the shared PCIe endpoint having a shared device, the shared PCIe endpoint coupled to a PCIe switch, the PCIe switch including a transport port, a PCIe bus coupling a microprocessor to the transparent port, the PCIe switch further including a primary address translation table, a server address space having associated therewith a server address;
- using the microprocessor, programming in the primary address translation table with the server address, the microprocessor being a part of a shared PCIe endpoint;
- and
- using the PCIe switch, re-directing the memory accesses, directed to the at least one primary port memory map, to the server address space according to the primary address translation table.
A shared Peripheral Component Interconnect express (PCIe) end point system comprising:
- a shared PCIe end point including a microprocessor and a shared device, the shared PCIe end point operable to initiate memory access to at least one primary port memory map;
- and
- a PCIe switch coupled to the microprocessor and including a transparent port, a PCIe bus coupling the microprocessor to the transport port, the PCIe switch primary port that includes a primary address translation table, a server address space having a server address, the microprocessor being operable to program the primary address translation table with the server address,
- wherein accesses directed to the at least one primary port memory map are re-directed to the server address space according to the primary address translation table.
A system coupled to a plurality of servers, each of the plurality of servers having a server address space, the server address space having associated therewith a server address, the system comprising:
- a shared PCIe end point, including a microprocessor, a shared device, and at least one primary port memory map;
- a Peripheral Component Interconnect express (PCIe) switch including a transparent port;
- a PCIe bus coupling the microprocessor to the transparent port, the PCIe switch having a primary port, the primary port including a primary address translation table, the microprocessor being operable to program the primary address translation table with the server address,
- wherein accesses directed to the primary port memory map are re-directed to the server address space according to the primary address translation table.
A method of sharing a PCIe end point across a plurality of servers, each of the plurality of servers having a server address space, the server address space having associated therewith a server address, the method comprising:
- initiating a memory access to at least one primary port map by a shared PCIe end point, the shared PCIe end point including a microprocessor and a shared device, the shared PCIe end point coupled to a PCIe switch, the PCIe switch including a transparent port, a PCIe bus coupling the microprocessor to the transparent port, the PCIe switch further including a primary port, the primary port including a primary address translation table;
- programming the primary address translation table with the server address;
- and
- re-directing accesses directed to the primary port memory map to the server address space according to the primary address translation table.
Dependencies are inferred from the claim text.