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US 8,806,088 B2Granted
Programming target devices via traces that traverse a structurally compromised region of a printed circuit board (PCB)
AssigneeMarvell World Trade Ltd.
InventorsWilliam B. Weiser, Thomas G. Warner
Life of this patent
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Abstract
The present disclosure describes techniques for scalable embedded memory programming. In some aspects data is received at a first communication interface from a host device, at least a portion of the data is stored to a memory device supported by a printed circuit board, and the data is transmitted to a target device via a second communication interface.
Claims20
A System-on-Chip (SoC) comprising:
- a first communication interface configured to communicate with a programming host;
- a second communication interface configured to communicate with a programmable target device via conductive traces that traverse a structurally compromised region of a printed circuit board (PCB), the structurally compromised region of the PCB forming at least one edge of a section of the PCB that supports the SoC, the section of the PCB that supports the SoC being physically separable from the PCB;
- a memory configured to store data associated with the SoC;
- and
- a data relay configured to:
- receive, via the first communication interface, data from the programming host;
- store at least a portion of the data received from the programming host in the memory;
- and
- transmit, via the second communication interface, at least the portion of the data to the programmable target device.
6 more elements
A System-on-Chip (SoC) comprising:
- a communication interface configured to communicate with a programming host via conductive traces that traverse a structurally compromised region of a printed circuit board (PCB), the structurally compromised region of the PCB forming at least one edge of a section of the PCB that supports the SoC, the section of the PCB that supports the SoC being physically separable from the PCB;
- a memory configured to store data associated with the SoC;
- and
- a data relay configured to:
- receive, via the communication interface, data from the programming host;
- store at least a portion of the data received from the programming host in the memory;
- and
- transmit, via the communication interface, information to the programming host that indicates a status associated with storing the portion of the data in the memory.
5 more elements
A System-on-Chip (SoC) comprising:
- a first communication interface configured to receive boot code;
- a second communication interface configured to communicate with a programming host via conductive traces that traverse a structurally compromised region of a printed circuit board (PCB), the structurally compromised region of the PCB forming at least one edge of a section of the PCB that supports the SoC, the section of the PCB that supports the SoC being physically separable from the PCB;
- a memory configured to store the boot code associated with the SoC;
- and
- a data relay configured to:
- receive, via the first communication interface, the boot code from a boot code device that is not located on the PCB;
- store the boot code received from the boot code device in the memory;
- cause the SoC to reboot effective to execute the boot code stored in the memory, the second communication interface enabled by the execution of the boot code;
- and
- receive, via the second communication interface once the second communication interface is enabled, additional boot code or data from the programming host that is executable to implement functionalities of the SoC.
7 more elements
Dependencies are inferred from the claim text.