Back to results
US 8,806,083 B2Granted
Identification address configuration circuit and method without use of dedicated address pins
AssigneeTexas Instruments Incorporated
InventorJerry L. Doorenbos
Life of this patent
Estimating the term…
Abstract
An identification address of a sensor interface device is configured in response to the order of connection of first (DXP1) and second (DXN1) package pins to electrodes of a sensor (Q0). A sensor signal processing circuit (23) has first and second inputs coupled through the first and second pins to the sensor for converting a parameter sensed by the sensor to a different representation. A current is forced through the first pin to produce either a high or low voltage on the first pin depending on the order of connection of the first and second pins to the electrodes of the sensor. A voltage on the first pin is compared with a reference voltage to produce a comparison signal which is mapped to produce the identification address.
Claims20
An apparatus comprising:
- a first sensor terminal;
- a second sensor terminal;
- a switch network that is coupled to the first and second sensor terminals;
- a controller that is coupled to the switch network so as to control the switch network;
- a first current source that is coupled to the switch network;
- a second current source that is coupled to the switch network;
- processing circuit that is coupled to the switch network, wherein the processing circuitry receives a sensor measurement through the first and second sensor terminals, and wherein the processing circuit is adapted to provide a representation of the sensor measurement over an inter-integrated circuit (I2C) bus;
- a first comparator having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the first comparator is coupled to the first current source and the switch network, and wherein the second input terminal of the first comparator receives a reference voltage;
- mapping circuitry that is coupled to the output terminal of the first comparator and that generates a device identifying address;
- and
- a second comparator that is coupled to the mapping circuitry, wherein the second comparator indicates whether the device identifying address matches a requested address.
8 more elements
An apparatus comprising:
- a plurality of sensor terminal pairs, wherein each sensor terminal pair includes a first sensor terminal and a second sensor terminal;
- a plurality of input circuits, wherein each input circuit is coupled to at least one of the sensor terminal pairs, and wherein each input circuit includes:
- a switch network that is coupled to the first and second sensor terminals of its sensor terminal pair;
- a controller that is coupled to the switch network so as to control the switch network;
- a first current source that is coupled to the switch network;
- and
- a second current source that is coupled to the switch network;
- processing circuit that is coupled to the switch network from each input circuit, wherein the processing circuitry receives sensor measurements through the sensor terminal pairs, and wherein the processing circuit is adapted to provide representations of the sensor measurements over an I2C bus;
- a set of comparators, wherein each comparator from the set of comparators includes a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of each comparator from the set of comparators is coupled to the first current source and the switch network from at least one of the input circuits, and wherein the second input terminal of each comparator from the set of comparators receives a reference voltage;
- mapping circuitry that is coupled to the output terminal of each comparator from the set of comparators and that generates a device identifying address;
- and
- a digital comparator that is coupled to the mapping circuitry, wherein the digital comparator indicates whether the device identifying address matches a requested address.
9 more elements
An apparatus comprising:
- an I2C master device;
- an I2C bus that is coupled to the I2C master device;
- a plurality of sensor interface devices, wherein each sensor interface device includes:
- a plurality of sensor terminal pairs, wherein each sensor terminal pair includes a first sensor terminal and a second sensor terminal;
- a plurality of input circuits, wherein each input circuit is coupled to at least one of the sensor terminal pairs, and wherein each input circuit includes:
- a switch network that is coupled to the first and second sensor terminals of its sensor terminal pair;
- a controller that is coupled to the switch network so as to control the switch network;
- a first current source that is coupled to the switch network;
- and
- a second current source that is coupled to the switch network;
- processing circuit that is coupled to the switch network from each input circuit and the I2C bus, wherein the processing circuitry receives sensor measurements through the sensor terminal pairs, and wherein the processing circuit is adapted to provide representations of the sensor measurements over the I2C bus;
- a set of comparators, wherein each comparator from the set of comparators includes a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of each comparator from the set of comparators is coupled to the first current source and the switch network from at least one of the input circuits, and wherein the second input terminal of each comparator from the set of comparators receives a reference voltage;
- mapping circuitry that is coupled to the output terminal of each comparator from the set of comparators and that generates a device identifying address;
- address request circuitry that is coupled to the I2C bus;
- and
- a digital comparator that is coupled to the mapping circuitry, the address request circuitry, and the I2C bus, wherein the digital comparator indicates whether the device identifying address matches a requested address over the I2C bus;
- and
- a plurality of sensors, wherein each sensor is coupled across at least one of the sensor terminal pairs.
15 more elements
Dependencies are inferred from the claim text.