Direct memory access device for multi-core system and operating method of the same
AssigneeSamsung Electronics Co., Ltd.
InventorDoo Hyun Kim
Life of this patent
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Abstract
A Direct Memory Access (DMA) device for a multi-core system, and an operating method of the DMA device are provided. The DMA device includes a channel state determining unit to determine whether at least one channel among a source channel and a destination channel is available, the source channel being formed between a source core and the DMA device, and the destination channel being formed between a destination core and the DMA device, and a data transmission processing unit to process data of the source core to be transmitted to the destination core, when both the source channel and the destination channel are determined to be available.
Claims23
A Direct Memory Access (DMA) device, comprising:
- a channel state determining unit to determine whether at least one channel among a source channel and a destination channel is available, the source channel being formed between a source core and the DMA device, and the destination channel being formed between a destination core and the DMA device;
- and
- a data transmission processing unit to transmit data of the source core to the destination core when both the source channel and the destination channel are determined to be available,
- wherein the channel state determining unit comprises:
- a source channel state determiner to determine that the source channel is available, when a source channel start signal is set by the source core,
- wherein the source core sets the source channel start signal when data to be transmitted is stored.
An operating method of a Direct Memory Access (DMA) device, the method comprising:
- determining that both a source channel and a destination channel are available, when a source channel start signal and a destination channel start signal are respectively set by a source core and a destination core,
- wherein the source core sets the source channel start signal when data to be transmitted is stored;
- and
- transmitting data of the source core to the destination core when both the source channel and the destination channel are determined as available.
A multi-core system, comprising:
- a Direct Memory Access (DMA) device;
- a source core to set a source channel start signal to notify that a source channel is available, the source channel being formed between the source core and the DMA device;
- and
- a destination core to set a destination channel start signal to notify that a destination channel is available, the destination channel being formed between the destination core and the DMA device,
- wherein the source core sets the source channel start signal when data to be transmitted is stored, and when the source channel start signal and the destination channel start signal are determined as set, the DMA device transmits data of the source core to the destination core.
A Direct Memory Access (DMA) device, comprising:
- a register to store mode information required to identify a channel start signal, the channel start signal being requested to be verified;
- a channel start signal determining unit to determine the channel start signal based on the stored mode information;
- and
- a data transmission processing unit to process data of a source core to be transmitted to a destination core, when the determined channel start signal is verified and is set,
- wherein the channel start signal determining unit comprises:
- a source channel state determiner to determine that the source channel is available when a source channel start signal is set by the source core,
- wherein the source core sets the source channel start signal when data to be transmitted is stored.
An operating method of a Direct Memory Access (DMA) device, the method comprising:
- transmitting data from a source core to a destination core when a source channel start signal has been set by a source core indicating that the source core is available and a destination channel start signal has been set by a destination core indicating that the destination core is available,
- wherein the source core sets the soruce channel start signal when data to be transmitted is stored.
Dependencies are inferred from the claim text.