High-speed optical transceiver for InfiniBand and Ethernet

A processing and framing circuit for a high-speed optical transceiver for Infiniband, comprising:

• a first Infiniband processing circuit configured to map a first input Infiniband flow into a first Transparent Generic Framing Protocol (GFP-T) superblock and to demap the first GFP-T superblock into the first input Infiniband flow;
• a second Infiniband processing circuit configured to map a second input Infiniband flow into a second GFP-T superblock to demap the second GFP-T superblock into the second input Infiniband flow;
• a third Infiniband processing circuit configured to map a third input Infiniband flow into a third GFP-T superblock to demap the third GFP-T superblock into the third input Infiniband flow;
• a superblock multiplexer configured to multiplex the first GFP-T superblock, the second GFP-T superblock, and the third GFP-T superblock into a transmit composite signal;
• a framing circuit configured to frame the transmit composite signal into a transmit Optical Transport Network frame comprising an Optical Channel Transport Unit-3+ (OTU3+) signal;
• a SerDes Framer Interface Level 5+ interface configured to transmit the transmit Optical Transport Network frame and to receive a receive Optical Transport Network frame;
• a de-framing circuit configured to de-frame the receive Optical Transport Network frame into a receive composite signal;
• and
• a superblock demultiplexer configured to demultiplex the receive composite signal into the first GFP-T superblock, the second GFP-T superblock, and the third GFP-T superblock;
• wherein the first Infiniband processing circuit, the second Infiniband processing circuit, the third Infiniband processing circuit, and the superblock multiplexer are configured with a two stage GFP-T mapping process comprising mapping to superblocks and aggregation of superblocks.

A high-speed Ethernet transceiver, comprising:

• a plurality of physical client interfaces each configured to receive Ethernet client signals;
• processing circuitry connected to the plurality of physical client interfaces for receiving the Ethernet client signals, wherein the processing circuitry is configured to perform Ethernet control and processing on the Ethernet client signals;
• Optical Transport Network (OTN) framing circuitry receiving outputs from the processing circuitry, wherein the framing circuitry is configured to provide framing on a combination of the outputs from the processing circuitry;
• an optical quadrature demodulator providing an OTN framed input to the framing circuitry, wherein the optical quadrature demodulator is configured to receive a first optical signal and to demodulate the first optical signal;
• and
• an optical quadrature modulator receiving an OTN framed output from the framing circuitry, wherein the optical quadrature modulator is configured to modulate a second optical signal responsive to the OTN framed output and to transmit the second optical signal;
• wherein the processing circuitry and the OTN framing circuitry collectively are configured with a two stage GFP-T mapping process comprising mapping to superblocks and aggregation of superblocks.